qemu/hw/riscv/Kconfig
Bin Meng b609b7e319 hw/riscv: Move sifive_uart model to hw/char
This is an effort to clean up the hw/riscv directory. Ideally it
should only contain the RISC-V SoC / machine codes plus generic
codes. Let's move sifive_uart model to hw/char directory.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1599129623-68957-9-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-09-09 15:54:19 -07:00

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config HART
bool
config IBEX
bool
config SIFIVE
bool
select MSI_NONBROKEN
config SIFIVE_E
bool
select HART
select SIFIVE
select SIFIVE_CLINT
select SIFIVE_GPIO
select SIFIVE_PLIC
select SIFIVE_UART
select SIFIVE_E_PRCI
select UNIMP
config SIFIVE_U
bool
select CADENCE
select HART
select SIFIVE
select SIFIVE_CLINT
select SIFIVE_GPIO
select SIFIVE_PDMA
select SIFIVE_PLIC
select SIFIVE_UART
select SIFIVE_U_OTP
select SIFIVE_U_PRCI
select UNIMP
config SPIKE
bool
select HART
select HTIF
select SIFIVE
select SIFIVE_CLINT
select SIFIVE_PLIC
config OPENTITAN
bool
select IBEX
select HART
select UNIMP
config RISCV_VIRT
bool
imply PCI_DEVICES
imply TEST_DEVICES
select PCI
select HART
select SERIAL
select GOLDFISH_RTC
select VIRTIO_MMIO
select PCI_EXPRESS_GENERIC_BRIDGE
select PFLASH_CFI01
select SIFIVE
select SIFIVE_CLINT
select SIFIVE_PLIC
config MICROCHIP_PFSOC
bool
select HART
select SIFIVE
select SIFIVE_CLINT
select UNIMP
select MCHP_PFSOC_MMUART
select SIFIVE_PDMA
select SIFIVE_PLIC
select CADENCE_SDHCI