Richard Henderson 10b8eb94c0 target/i386: Verify memory operand for lcall and ljmp ...

These two opcodes only allow a memory operand.

Lacking the check for a register operand, we used the A0 temp
without initialization, which led to a tcg abort.

Buglink: https://bugs.launchpad.net/qemu/+bug/1921138
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210324164650.128608-1-richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

2021-04-01 09:40:45 +02:00

..

bpt_helper.c

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cc_helper_template.h

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cc_helper.c

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excp_helper.c

target/i386: allow modifying TCG phys-addr-bits

2021-03-19 08:48:18 -04:00

fpu_helper.c

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helper-tcg.h

target/i386: svm: do not discard high 32 bits of EXITINFO1

2021-03-19 08:48:18 -04:00

int_helper.c

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mem_helper.c

exec: Use cpu_untagged_addr in g2h; split out g2h_untagged

2021-02-16 11:04:53 +00:00

meson.build

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misc_helper.c

target/i386: fail if toggling LA57 in 64-bit mode

2021-03-19 08:48:18 -04:00

mpx_helper.c

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seg_helper.c

target/i386: svm: do not discard high 32 bits of EXITINFO1

2021-03-19 08:48:18 -04:00

smm_helper.c

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svm_helper.c

target/i386: svm: do not discard high 32 bits of EXITINFO1

2021-03-19 08:48:18 -04:00

tcg-cpu.c

cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass

2021-02-05 10:24:15 -10:00

tcg-cpu.h

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tcg-stub.c

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translate.c

target/i386: Verify memory operand for lcall and ljmp

2021-04-01 09:40:45 +02:00