378e43fa72
After the original Zicond support was stuck/fell through the cracks on the mailing list at v3 (and a different implementation was merged in the meanwhile), we need to refactor Zicond to prepare it to be reused by XVentanaCondOps. This commit lifts the common logic out into gen_czero and uses this via gen_logic and 2 helper functions (effectively partial closures). Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230307180708.302867-2-philipp.tomsich@vrull.eu> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
56 lines
1.6 KiB
C++
56 lines
1.6 KiB
C++
/*
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* RISC-V translation routines for the Zicond Standard Extension.
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*
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* Copyright (c) 2020-2023 PLCT Lab
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* Copyright (c) 2022 VRULL GmbH.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2 or later, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#define REQUIRE_ZICOND(ctx) do { \
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if (!ctx->cfg_ptr->ext_zicond) { \
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return false; \
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} \
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} while (0)
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/* Emits "$rd = ($rs2 <cond> $zero) ? $zero : $rs1" */
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static void gen_czero(TCGv dest, TCGv src1, TCGv src2, TCGCond cond)
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{
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TCGv zero = tcg_constant_tl(0);
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tcg_gen_movcond_tl(cond, dest, src2, zero, zero, src1);
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}
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static void gen_czero_eqz(TCGv dest, TCGv src1, TCGv src2)
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{
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gen_czero(dest, src1, src2, TCG_COND_EQ);
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}
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static void gen_czero_nez(TCGv dest, TCGv src1, TCGv src2)
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{
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gen_czero(dest, src1, src2, TCG_COND_NE);
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}
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static bool trans_czero_eqz(DisasContext *ctx, arg_r *a)
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{
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REQUIRE_ZICOND(ctx);
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return gen_logic(ctx, a, gen_czero_eqz);
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}
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static bool trans_czero_nez(DisasContext *ctx, arg_r *a)
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{
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REQUIRE_ZICOND(ctx);
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return gen_logic(ctx, a, gen_czero_nez);
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}
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