0e8b3010af
As per "Cavium Networks OCTEON Plus CN50XX Hardware Reference Manual" offset field is signed 16 bit value. However arg_BBIT.offset is unsigned. We need to cast it as signed to do address calculation. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Acked-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20221031132531.18122-3-jiaxun.yang@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
42 lines
1.2 KiB
Plaintext
42 lines
1.2 KiB
Plaintext
# Octeon Architecture Module instruction set
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#
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# Copyright (C) 2022 Pavel Dovgalyuk
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#
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# SPDX-License-Identifier: LGPL-2.1-or-later
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#
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# Branch on bit set or clear
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# BBIT0 110010 ..... ..... ................
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# BBIT032 110110 ..... ..... ................
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# BBIT1 111010 ..... ..... ................
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# BBIT132 111110 ..... ..... ................
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%bbit_p 28:1 16:5
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BBIT 11 set:1 . 10 rs:5 ..... offset:s16 p=%bbit_p
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# Arithmetic
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# BADDU rd, rs, rt
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# DMUL rd, rs, rt
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# EXTS rt, rs, p, lenm1
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# EXTS32 rt, rs, p, lenm1
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# CINS rt, rs, p, lenm1
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# CINS32 rt, rs, p, lenm1
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# DPOP rd, rs
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# POP rd, rs
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# SEQ rd, rs, rt
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# SEQI rt, rs, immediate
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# SNE rd, rs, rt
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# SNEI rt, rs, immediate
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@r3 ...... rs:5 rt:5 rd:5 ..... ......
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%bitfield_p 0:1 6:5
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@bitfield ...... rs:5 rt:5 lenm1:5 ..... ..... . p=%bitfield_p
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BADDU 011100 ..... ..... ..... 00000 101000 @r3
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DMUL 011100 ..... ..... ..... 00000 000011 @r3
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EXTS 011100 ..... ..... ..... ..... 11101 . @bitfield
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CINS 011100 ..... ..... ..... ..... 11001 . @bitfield
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POP 011100 rs:5 00000 rd:5 00000 10110 dw:1
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SEQNE 011100 rs:5 rt:5 rd:5 00000 10101 ne:1
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SEQNEI 011100 rs:5 rt:5 imm:s10 10111 ne:1
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