qemu/target-arm
Peter Maydell a4ba200894 More migration fixes and more record/replay preparations. Also moves
the sdhci-pci device id to make space for the rocker device.
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Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

More migration fixes and more record/replay preparations.  Also moves
the sdhci-pci device id to make space for the rocker device.

# gpg: Signature made Sat 03 Jan 2015 08:22:36 GMT using RSA key ID 78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>"
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>"
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg:          It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream:
  pci: move REDHAT_SDHCI device ID to make room for Rocker
  block/iscsi: fix uninitialized variable
  pckbd: set bits 2-3-6-7 of the output port by default
  serial: refine serial_thr_ipending_needed
  gen-icount: check cflags instead of use_icount global
  translate: check cflags instead of use_icount global
  cpu-exec: add a new CF_USE_ICOUNT cflag
  target-ppc: pass DisasContext to SPR generator functions
  atomic: fix position of volatile qualifier

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-01-09 16:29:36 +00:00
..
arm_ldst.h softmmu: introduce cpu_ldst.h 2014-06-05 16:10:33 +02:00
arm-semi.c Pass semihosting exit code back to system. 2014-12-11 12:07:48 +00:00
cpu64.c target-arm: Report a valid L1Ip field in CTR_EL0 for CPU type "any" 2014-10-24 12:19:13 +01:00
cpu-qom.h target-arm: Add ARMCPU secure property 2014-12-22 23:12:28 +00:00
cpu.c target-arm: add cpu feature EL3 to CPUs with Security Extensions 2014-12-22 23:12:28 +00:00
cpu.h target-arm: make MAIR0/1 banked 2014-12-11 12:07:52 +00:00
crypto_helper.c target-arm: Use Common Tables in AES Instructions 2014-06-16 13:24:33 +02:00
gdbstub64.c target-arm/gdbstub64.c: remove useless 'break' statement. 2014-04-17 21:34:06 +01:00
gdbstub.c cpu: Introduce CPUClass::gdb_{read,write}_register() 2013-07-27 00:04:17 +02:00
helper-a64.c target-arm: rename arm_current_pl to arm_current_el 2014-10-24 12:19:14 +01:00
helper-a64.h target-arm: A64: Implement CRC instructions 2014-06-09 16:06:12 +01:00
helper.c target-arm: Merge EL3 CP15 register lists 2014-12-22 23:12:27 +00:00
helper.h target-arm: A64: Emulate the SMC insn 2014-09-29 18:48:50 +01:00
internals.h target-arm: make TTBCR banked 2014-12-11 12:07:51 +00:00
iwmmxt_helper.c target-arm: Delete unused iwmmxt_msadb helper 2014-06-09 16:06:12 +01:00
kvm32.c target-arm/kvm: make reg sync code common between kvm32/64 2014-12-11 12:07:53 +00:00
kvm64.c target-arm/kvm: make reg sync code common between kvm32/64 2014-12-11 12:07:53 +00:00
kvm_arm.h target-arm/kvm: make reg sync code common between kvm32/64 2014-12-11 12:07:53 +00:00
kvm-consts.h target-arm: add missing PSCI constants needed for PSCI emulation 2014-10-24 12:19:12 +01:00
kvm-stub.c target-arm: Initialize cpreg list from KVM when using KVM 2013-06-25 18:16:10 +01:00
kvm.c target-arm: Check error conditions on kvm_arm_reset_vcpu 2014-12-11 12:07:53 +00:00
machine.c target-arm: Support save/load for 64 bit CPUs 2014-12-11 12:07:53 +00:00
Makefile.objs target-arm: add emulation of PSCI calls for system emulation 2014-10-24 12:19:13 +01:00
neon_helper.c target-arm: add support for v8 VMULL.P64 instruction 2014-06-09 16:06:11 +01:00
op_addsub.h Correct spelling of licensed 2011-07-23 11:26:12 -05:00
op_helper.c target-arm: make c13 cp regs banked (FCSEIDR, ...) 2014-12-11 12:07:52 +00:00
psci.c target-arm: add emulation of PSCI calls for system emulation 2014-10-24 12:19:13 +01:00
translate-a64.c gen-icount: check cflags instead of use_icount global 2015-01-03 09:22:12 +01:00
translate.c gen-icount: check cflags instead of use_icount global 2015-01-03 09:22:12 +01:00
translate.h target-arm: add non-secure Translation Block flag 2014-12-11 12:07:48 +00:00