f68774ccd8
Don't generate handlers for IRQ levels that are not defined for the CPU or for window overflow/underflow exceptions for configs w/o windowed registers. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
56 lines
974 B
ArmAsm
56 lines
974 B
ArmAsm
#include "core-isa.h"
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.macro vector name
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.section .vector.\name
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j 1f
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.section .vector.\name\().text
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1:
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wsr a2, excsave1
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movi a2, handler_\name
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l32i a2, a2, 0
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beqz a2, 1f
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jx a2
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1:
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movi a3, 1b
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movi a2, 1
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simcall
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.align 4
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.global handler_\name
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handler_\name\(): .word 0
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.endm
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#if XCHAL_HAVE_WINDOWED
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vector window_overflow_4
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vector window_overflow_8
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vector window_overflow_12
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vector window_underflow_4
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vector window_underflow_8
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vector window_underflow_12
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#endif
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#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 2
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vector level2
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#endif
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#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 3
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vector level3
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#endif
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#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 4
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vector level4
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#endif
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#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 5
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vector level5
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#endif
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#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 6
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vector level6
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#endif
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#if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 7
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vector level7
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#endif
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vector kernel
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vector user
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vector double
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