qemu/target/arm
Peter Maydell b355f08a37 target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML
Currently we send VFP XML which includes D0..D15 or D0..D31, plus
FPSID, FPSCR and FPEXC.  The upstream GDB tolerates this, but its
definition of this XML feature does not include FPSID or FPEXC.  In
particular, for M-profile cores there are no FPSID or FPEXC
registers, so advertising those is wrong.

Move FPSID and FPEXC into their own bit of XML which we only send for
A and R profile cores.  This brings our definition of the XML
org.gnu.gdb.arm.vfp feature into line with GDB's own (at least for
non-Neon cores...) and means we don't claim to have FPSID and FPEXC
on M-profile.

(It seems unlikely to me that any gdbstub users really care about
being able to look at FPEXC and FPSID; but we've supplied them to gdb
for a decade and it's not hard to keep doing so.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210921162901.17508-5-peter.maydell@linaro.org
2021-09-30 13:42:10 +01:00
..
hvf hvf: arm: Add rudimentary PMC support 2021-09-21 16:28:27 +01:00
a32-uncond.decode
a32.decode
arch_dump.c
arm_ldst.h accel/tcg: Add DisasContextBase argument to translator_ld* 2021-09-14 12:00:20 -07:00
arm-powerctl.c
arm-powerctl.h
cpu64.c target-arm: Add support for Fujitsu A64FX 2021-09-01 11:08:18 +01:00
cpu_tcg.c target/arm: Restrict cpu_exec_interrupt() handler to sysemu 2021-09-14 12:00:21 -07:00
cpu-param.h
cpu-qom.h
cpu.c hvf: arm: Implement PSCI handling 2021-09-21 16:28:26 +01:00
cpu.h include/exec: Move cpu_signal_handler declaration 2021-09-21 19:36:44 -07:00
crypto_helper.c
debug_helper.c accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
gdbstub64.c target/arm: Move gdbstub related code out of helper.c 2021-09-30 13:42:10 +01:00
gdbstub.c target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML 2021-09-30 13:42:10 +01:00
helper-a64.c target/arm: Take an exception if PSTATE.IL is set 2021-09-13 21:01:08 +01:00
helper-a64.h
helper-mve.h target/arm: Implement MVE VRINT insns 2021-09-01 11:08:17 +01:00
helper-sve.h target/arm: Implement vector float32 to bfloat16 conversion 2021-06-03 16:43:26 +01:00
helper.c target/arm: Move gdbstub related code out of helper.c 2021-09-30 13:42:10 +01:00
helper.h target/arm: Implement HSTR.TJDBX 2021-08-26 17:02:01 +01:00
hvf_arm.h hvf: arm: Implement -cpu host 2021-09-21 16:28:26 +01:00
idau.h
internals.h target/arm: Move gdbstub related code out of helper.c 2021-09-30 13:42:10 +01:00
iwmmxt_helper.c
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
kvm64.c target/arm/kvm64: Ensure sve vls map is completely clear 2021-08-26 17:01:59 +01:00
kvm_arm.h hvf: arm: Implement -cpu host 2021-09-21 16:28:26 +01:00
kvm-consts.h
kvm-stub.c
kvm.c hw/arm/virt: KVM: Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VM 2021-09-13 16:07:22 +01:00
m_helper.c target/arm: Implement M-profile trapping on division by zero 2021-08-25 10:48:50 +01:00
m-nocp.decode target/arm: Don't NOCP fault for FPCXT_NS accesses 2021-06-21 16:49:37 +01:00
machine.c target/arm: Enforce that FPDSCR.LTPSIZE is 4 on inbound migration 2021-09-21 16:28:27 +01:00
meson.build arm: Add Hypervisor.framework build target 2021-09-21 16:28:26 +01:00
monitor.c
mte_helper.c target/arm: Implement MTE3 2021-06-24 14:58:48 +01:00
mve_helper.c target/arm: Implement MVE VRINT insns 2021-09-01 11:08:17 +01:00
mve.decode target/arm: Implement MVE VRINT insns 2021-09-01 11:08:17 +01:00
neon_helper.c
neon-dp.decode target/arm: Implement vector float32 to bfloat16 conversion 2021-06-03 16:43:26 +01:00
neon-ls.decode target/arm: Remove duplicate 'plus1' function from Neon and SVE decode 2021-07-18 10:59:47 +01:00
neon-shared.decode target/arm: Remove duplicate 'plus1' function from Neon and SVE decode 2021-07-18 10:59:47 +01:00
op_addsub.h
op_helper.c target/arm: Implement HSTR.TJDBX 2021-08-26 17:02:01 +01:00
pauth_helper.c
psci.c arm: tcg: Adhere to SMCCC 1.3 section 5.2 2021-09-30 13:42:09 +01:00
sve_helper.c bitops.h: Provide hswap32(), hswap64(), wswap64() swapping operations 2021-06-16 14:33:52 +01:00
sve.decode target/arm: Remove duplicate 'plus1' function from Neon and SVE decode 2021-07-18 10:59:47 +01:00
syndrome.h target/arm: Take an exception if PSTATE.IL is set 2021-09-13 21:01:08 +01:00
t16.decode
t32.decode target/arm: Implement MVE VCTP 2021-08-25 10:48:50 +01:00
tlb_helper.c
trace-events docs: fix references to docs/devel/tracing.rst 2021-06-02 06:51:09 +02:00
trace.h
translate-a32.h target/arm: Implement MVE VCTP 2021-08-25 10:48:50 +01:00
translate-a64.c accel/tcg: Add DisasContextBase argument to translator_ld* 2021-09-14 12:00:20 -07:00
translate-a64.h
translate-m-nocp.c target/arm: Add TB flag for "MVE insns not predicated" 2021-09-21 16:28:27 +01:00
translate-mve.c target/arm: Optimize MVE 1op-immediate insns 2021-09-21 16:28:27 +01:00
translate-neon.c target/arm: Implement MVE VADD (floating-point) 2021-09-01 11:08:16 +01:00
translate-sve.c target/arm: Remove duplicate 'plus1' function from Neon and SVE decode 2021-07-18 10:59:47 +01:00
translate-vfp.c target/arm: Add TB flag for "MVE insns not predicated" 2021-09-21 16:28:27 +01:00
translate.c target/arm: Add TB flag for "MVE insns not predicated" 2021-09-21 16:28:27 +01:00
translate.h target/arm: Add TB flag for "MVE insns not predicated" 2021-09-21 16:28:27 +01:00
vec_helper.c target/arm: Implement MVE VMULL (polynomial) 2021-08-25 10:48:49 +01:00
vec_internal.h target/arm: Implement MVE VMULL (polynomial) 2021-08-25 10:48:49 +01:00
vfp_helper.c target/arm: Check NaN mode before silencing NaN 2021-07-02 11:48:36 +01:00
vfp-uncond.decode
vfp.decode target/arm: Don't NOCP fault for FPCXT_NS accesses 2021-06-21 16:49:37 +01:00