144 lines
4.3 KiB
C
144 lines
4.3 KiB
C
/*
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* QEMU ISA MM VGA Emulator.
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "hw.h"
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#include "ui/console.h"
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#include "pc.h"
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#include "vga_int.h"
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#include "ui/pixel_ops.h"
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#include "qemu/timer.h"
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#define VGA_RAM_SIZE (8192 * 1024)
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typedef struct ISAVGAMMState {
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VGACommonState vga;
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int it_shift;
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} ISAVGAMMState;
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/* Memory mapped interface */
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static uint32_t vga_mm_readb (void *opaque, hwaddr addr)
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{
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ISAVGAMMState *s = opaque;
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return vga_ioport_read(&s->vga, addr >> s->it_shift) & 0xff;
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}
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static void vga_mm_writeb (void *opaque,
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hwaddr addr, uint32_t value)
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{
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ISAVGAMMState *s = opaque;
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vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xff);
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}
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static uint32_t vga_mm_readw (void *opaque, hwaddr addr)
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{
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ISAVGAMMState *s = opaque;
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return vga_ioport_read(&s->vga, addr >> s->it_shift) & 0xffff;
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}
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static void vga_mm_writew (void *opaque,
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hwaddr addr, uint32_t value)
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{
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ISAVGAMMState *s = opaque;
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vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xffff);
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}
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static uint32_t vga_mm_readl (void *opaque, hwaddr addr)
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{
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ISAVGAMMState *s = opaque;
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return vga_ioport_read(&s->vga, addr >> s->it_shift);
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}
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static void vga_mm_writel (void *opaque,
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hwaddr addr, uint32_t value)
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{
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ISAVGAMMState *s = opaque;
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vga_ioport_write(&s->vga, addr >> s->it_shift, value);
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}
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static const MemoryRegionOps vga_mm_ctrl_ops = {
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.old_mmio = {
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.read = {
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vga_mm_readb,
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vga_mm_readw,
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vga_mm_readl,
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},
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.write = {
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vga_mm_writeb,
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vga_mm_writew,
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vga_mm_writel,
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},
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},
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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static void vga_mm_init(ISAVGAMMState *s, hwaddr vram_base,
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hwaddr ctrl_base, int it_shift,
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MemoryRegion *address_space)
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{
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MemoryRegion *s_ioport_ctrl, *vga_io_memory;
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s->it_shift = it_shift;
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s_ioport_ctrl = g_malloc(sizeof(*s_ioport_ctrl));
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memory_region_init_io(s_ioport_ctrl, &vga_mm_ctrl_ops, s,
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"vga-mm-ctrl", 0x100000);
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memory_region_set_flush_coalesced(s_ioport_ctrl);
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vga_io_memory = g_malloc(sizeof(*vga_io_memory));
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/* XXX: endianness? */
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memory_region_init_io(vga_io_memory, &vga_mem_ops, &s->vga,
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"vga-mem", 0x20000);
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vmstate_register(NULL, 0, &vmstate_vga_common, s);
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memory_region_add_subregion(address_space, ctrl_base, s_ioport_ctrl);
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s->vga.bank_offset = 0;
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memory_region_add_subregion(address_space,
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vram_base + 0x000a0000, vga_io_memory);
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memory_region_set_coalescing(vga_io_memory);
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}
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int isa_vga_mm_init(hwaddr vram_base,
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hwaddr ctrl_base, int it_shift,
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MemoryRegion *address_space)
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{
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ISAVGAMMState *s;
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s = g_malloc0(sizeof(*s));
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s->vga.vram_size_mb = VGA_RAM_SIZE >> 20;
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vga_common_init(&s->vga);
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vga_mm_init(s, vram_base, ctrl_base, it_shift, address_space);
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s->vga.ds = graphic_console_init(s->vga.update, s->vga.invalidate,
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s->vga.screen_dump, s->vga.text_update, s);
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vga_init_vbe(&s->vga, address_space);
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return 0;
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}
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