mirror of https://gitlab.com/qemu-project/qemu
b20b7b7add
PAPR guests advertise their capabilities to the platform by passing an ibm,architecture-vec structure via an ibm,client-architecture-support hcall as described by LoPAPR v11, B.6.2.3. during early boot. Using this information, the platform enables the capabilities it supports, then encodes a subset of those enabled capabilities (the 5th option vector of the ibm,architecture-vec structure passed to ibm,client-architecture-support) into the guest device tree via "/chosen/ibm,architecture-vec-5". The logical format of these these option vectors is a bit-vector, where individual bits are addressed/documented based on the byte-wise offset from the beginning of the bit-vector, followed by the bit-wise index starting from the byte-wise offset. Thus the bits of each of these bytes are stored in reverse order. Additionally, the first byte of each option vector is encodes the length of the option vector, so byte offsets begin at 1, and bit offset at 0. This is not very intuitive for the purposes of mapping these bits to a particular documented capability, so this patch introduces a set of abstractions that encapsulate the work of parsing/encoding these options vectors and testing for individual capabilities. Cc: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com> [dwg: Tweaked double-include protection to not trigger a checkpatch false positive] Signed-off-by: David Gibson <david@gibson.dropbear.id.au> |
||
|---|---|---|
| .. | ||
| fdt.h | ||
| mac_dbdma.h | ||
| openpic.h | ||
| pnv.h | ||
| pnv_core.h | ||
| pnv_lpc.h | ||
| pnv_xscom.h | ||
| ppc.h | ||
| ppc4xx.h | ||
| ppc_e500.h | ||
| spapr.h | ||
| spapr_cpu_core.h | ||
| spapr_drc.h | ||
| spapr_ovec.h | ||
| spapr_rtas.h | ||
| spapr_vio.h | ||
| xics.h | ||