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qemu/hw/m68k/q800.c
Laurent Vivier 653901ca2b q800: fix I/O memory map 
Linux kernel 5.4 will introduce a new memory map for SWIM device.
(aee6bff1c325 ("m68k: mac: Revisit floppy disc controller base addresses"))

Until this release all MMIO are mapped between 0x50f00000 and 0x50f40000,
but it appears that for real hardware 0x50f00000 is not the base address:
the MMIO region spans 0x50000000 through 0x60000000, and 0x50040000 through
0x54000000 is repeated images of 0x50000000 to 0x50040000.

Fixed: 04e7ca8d0f ("hw/m68k: define Macintosh Quadra 800")
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20191104101513.29518-1-laurent@vivier.eu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-11-05 18:52:29 +01:00

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/*
* QEMU Motorla 680x0 Macintosh hardware System Emulator
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
#include "qemu/units.h"
#include "qemu-common.h"
#include "sysemu/sysemu.h"
#include "cpu.h"
#include "hw/hw.h"
#include "hw/boards.h"
#include "hw/irq.h"
#include "elf.h"
#include "hw/loader.h"
#include "ui/console.h"
#include "exec/address-spaces.h"
#include "hw/char/escc.h"
#include "hw/sysbus.h"
#include "hw/scsi/esp.h"
#include "bootinfo.h"
#include "hw/misc/mac_via.h"
#include "hw/input/adb.h"
#include "hw/nubus/mac-nubus-bridge.h"
#include "hw/display/macfb.h"
#include "hw/block/swim.h"
#include "net/net.h"
#include "qapi/error.h"
#include "sysemu/qtest.h"
#include "sysemu/runstate.h"
#include "sysemu/reset.h"
#define MACROM_ADDR 0x40000000
#define MACROM_SIZE 0x00100000
#define MACROM_FILENAME "MacROM.bin"
#define Q800_MACHINE_ID 35
#define Q800_CPU_ID (1 << 2)
#define Q800_FPU_ID (1 << 2)
#define Q800_MMU_ID (1 << 2)
#define MACH_MAC 3
#define Q800_MAC_CPU_ID 2
#define IO_BASE 0x50000000
#define IO_SLICE 0x00040000
#define IO_SIZE 0x04000000
#define VIA_BASE (IO_BASE + 0x00000)
#define SONIC_PROM_BASE (IO_BASE + 0x08000)
#define SONIC_BASE (IO_BASE + 0x0a000)
#define SCC_BASE (IO_BASE + 0x0c020)
#define ESP_BASE (IO_BASE + 0x10000)
#define ESP_PDMA (IO_BASE + 0x10100)
#define ASC_BASE (IO_BASE + 0x14000)
#define SWIM_BASE (IO_BASE + 0x1E000)
#define NUBUS_SUPER_SLOT_BASE 0x60000000
#define NUBUS_SLOT_BASE 0xf0000000
/*
* the video base, whereas it a Nubus address,
* is needed by the kernel to have early display and
* thus provided by the bootloader
*/
#define VIDEO_BASE 0xf9001000
#define MAC_CLOCK 3686418
/*
* The GLUE (General Logic Unit) is an Apple custom integrated circuit chip
* that performs a variety of functions (RAM management, clock generation, ...).
* The GLUE chip receives interrupt requests from various devices,
* assign priority to each, and asserts one or more interrupt line to the
* CPU.
*/
typedef struct {
M68kCPU *cpu;
uint8_t ipr;
} GLUEState;
static void GLUE_set_irq(void *opaque, int irq, int level)
{
GLUEState *s = opaque;
int i;
if (level) {
s->ipr |= 1 << irq;
} else {
s->ipr &= ~(1 << irq);
}
for (i = 7; i >= 0; i--) {
if ((s->ipr >> i) & 1) {
m68k_set_irq_level(s->cpu, i + 1, i + 25);
return;
}
}
m68k_set_irq_level(s->cpu, 0, 0);
}
static void main_cpu_reset(void *opaque)
{
M68kCPU *cpu = opaque;
CPUState *cs = CPU(cpu);
cpu_reset(cs);
cpu->env.aregs[7] = ldl_phys(cs->as, 0);
cpu->env.pc = ldl_phys(cs->as, 4);
}
static void q800_init(MachineState *machine)
{
M68kCPU *cpu = NULL;
int linux_boot;
int32_t kernel_size;
uint64_t elf_entry;
char *filename;
int bios_size;
ram_addr_t initrd_base;
int32_t initrd_size;
MemoryRegion *rom;
MemoryRegion *ram;
MemoryRegion *io;
const int io_slice_nb = (IO_SIZE / IO_SLICE) - 1;
int i;
ram_addr_t ram_size = machine->ram_size;
const char *kernel_filename = machine->kernel_filename;
const char *initrd_filename = machine->initrd_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
hwaddr parameters_base;
CPUState *cs;
DeviceState *dev;
DeviceState *via_dev;
SysBusESPState *sysbus_esp;
ESPState *esp;
SysBusDevice *sysbus;
BusState *adb_bus;
NubusBus *nubus;
GLUEState *irq;
qemu_irq *pic;
linux_boot = (kernel_filename != NULL);
if (ram_size > 1 * GiB) {
error_report("Too much memory for this machine: %" PRId64 " MiB, "
"maximum 1024 MiB", ram_size / MiB);
exit(1);
}
/* init CPUs */
cpu = M68K_CPU(cpu_create(machine->cpu_type));
qemu_register_reset(main_cpu_reset, cpu);
/* RAM */
ram = g_malloc(sizeof(*ram));
memory_region_init_ram(ram, NULL, "m68k_mac.ram", ram_size, &error_abort);
memory_region_add_subregion(get_system_memory(), 0, ram);
/*
* Memory from IO_BASE to IO_BASE + IO_SLICE is repeated
* from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE
*/
io = g_new(MemoryRegion, io_slice_nb);
for (i = 0; i < io_slice_nb; i++) {
char *name = g_strdup_printf("mac_m68k.io[%d]", i + 1);
memory_region_init_alias(&io[i], NULL, name, get_system_memory(),
IO_BASE, IO_SLICE);
memory_region_add_subregion(get_system_memory(),
IO_BASE + (i + 1) * IO_SLICE, &io[i]);
g_free(name);
}
/* IRQ Glue */
irq = g_new0(GLUEState, 1);
irq->cpu = cpu;
pic = qemu_allocate_irqs(GLUE_set_irq, irq, 8);
/* VIA */
via_dev = qdev_create(NULL, TYPE_MAC_VIA);
qdev_init_nofail(via_dev);
sysbus = SYS_BUS_DEVICE(via_dev);
sysbus_mmio_map(sysbus, 0, VIA_BASE);
qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 0, pic[0]);
qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 1, pic[1]);
adb_bus = qdev_get_child_bus(via_dev, "adb.0");
dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
qdev_init_nofail(dev);
dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
qdev_init_nofail(dev);
/* MACSONIC */
if (nb_nics > 1) {
error_report("q800 can only have one ethernet interface");
exit(1);
}
qemu_check_nic_model(&nd_table[0], "dp83932");
/*
* MacSonic driver needs an Apple MAC address
* Valid prefix are:
* 00:05:02 Apple
* 00:80:19 Dayna Communications, Inc.
* 00:A0:40 Apple
* 08:00:07 Apple
* (Q800 use the last one)
*/
nd_table[0].macaddr.a[0] = 0x08;
nd_table[0].macaddr.a[1] = 0x00;
nd_table[0].macaddr.a[2] = 0x07;
dev = qdev_create(NULL, "dp8393x");
qdev_set_nic_properties(dev, &nd_table[0]);
qdev_prop_set_uint8(dev, "it_shift", 2);
qdev_prop_set_bit(dev, "big_endian", true);
qdev_prop_set_ptr(dev, "dma_mr", get_system_memory());
qdev_init_nofail(dev);
sysbus = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(sysbus, 0, SONIC_BASE);
sysbus_mmio_map(sysbus, 1, SONIC_PROM_BASE);
sysbus_connect_irq(sysbus, 0, pic[2]);
/* SCC */
dev = qdev_create(NULL, TYPE_ESCC);
qdev_prop_set_uint32(dev, "disabled", 0);
qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK);
qdev_prop_set_uint32(dev, "it_shift", 1);
qdev_prop_set_bit(dev, "bit_swap", true);
qdev_prop_set_chr(dev, "chrA", serial_hd(0));
qdev_prop_set_chr(dev, "chrB", serial_hd(1));
qdev_prop_set_uint32(dev, "chnBtype", 0);
qdev_prop_set_uint32(dev, "chnAtype", 0);
qdev_init_nofail(dev);
sysbus = SYS_BUS_DEVICE(dev);
sysbus_connect_irq(sysbus, 0, pic[3]);
sysbus_connect_irq(sysbus, 1, pic[3]);
sysbus_mmio_map(sysbus, 0, SCC_BASE);
/* SCSI */
dev = qdev_create(NULL, TYPE_ESP);
sysbus_esp = ESP_STATE(dev);
esp = &sysbus_esp->esp;
esp->dma_memory_read = NULL;
esp->dma_memory_write = NULL;
esp->dma_opaque = NULL;
sysbus_esp->it_shift = 4;
esp->dma_enabled = 1;
qdev_init_nofail(dev);
sysbus = SYS_BUS_DEVICE(dev);
sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in_named(via_dev,
"via2-irq",
VIA2_IRQ_SCSI_BIT));
sysbus_connect_irq(sysbus, 1,
qdev_get_gpio_in_named(via_dev, "via2-irq",
VIA2_IRQ_SCSI_DATA_BIT));
sysbus_mmio_map(sysbus, 0, ESP_BASE);
sysbus_mmio_map(sysbus, 1, ESP_PDMA);
scsi_bus_legacy_handle_cmdline(&esp->bus);
/* SWIM floppy controller */
dev = qdev_create(NULL, TYPE_SWIM);
qdev_init_nofail(dev);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, SWIM_BASE);
/* NuBus */
dev = qdev_create(NULL, TYPE_MAC_NUBUS_BRIDGE);
qdev_init_nofail(dev);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, NUBUS_SUPER_SLOT_BASE);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, NUBUS_SLOT_BASE);
nubus = MAC_NUBUS_BRIDGE(dev)->bus;
/* framebuffer in nubus slot #9 */
dev = qdev_create(BUS(nubus), TYPE_NUBUS_MACFB);
qdev_prop_set_uint32(dev, "width", graphic_width);
qdev_prop_set_uint32(dev, "height", graphic_height);
qdev_prop_set_uint8(dev, "depth", graphic_depth);
qdev_init_nofail(dev);
cs = CPU(cpu);
if (linux_boot) {
uint64_t high;
kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
&elf_entry, NULL, &high, 1,
EM_68K, 0, 0);
if (kernel_size < 0) {
error_report("could not load kernel '%s'", kernel_filename);
exit(1);
}
stl_phys(cs->as, 4, elf_entry); /* reset initial PC */
parameters_base = (high + 1) & ~1;
BOOTINFO1(cs->as, parameters_base, BI_MACHTYPE, MACH_MAC);
BOOTINFO1(cs->as, parameters_base, BI_FPUTYPE, Q800_FPU_ID);
BOOTINFO1(cs->as, parameters_base, BI_MMUTYPE, Q800_MMU_ID);
BOOTINFO1(cs->as, parameters_base, BI_CPUTYPE, Q800_CPU_ID);
BOOTINFO1(cs->as, parameters_base, BI_MAC_CPUID, Q800_MAC_CPU_ID);
BOOTINFO1(cs->as, parameters_base, BI_MAC_MODEL, Q800_MACHINE_ID);
BOOTINFO1(cs->as, parameters_base,
BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */
BOOTINFO2(cs->as, parameters_base, BI_MEMCHUNK, 0, ram_size);
BOOTINFO1(cs->as, parameters_base, BI_MAC_VADDR, VIDEO_BASE);
BOOTINFO1(cs->as, parameters_base, BI_MAC_VDEPTH, graphic_depth);
BOOTINFO1(cs->as, parameters_base, BI_MAC_VDIM,
(graphic_height << 16) | graphic_width);
BOOTINFO1(cs->as, parameters_base, BI_MAC_VROW,
(graphic_width * graphic_depth + 7) / 8);
BOOTINFO1(cs->as, parameters_base, BI_MAC_SCCBASE, SCC_BASE);
if (kernel_cmdline) {
BOOTINFOSTR(cs->as, parameters_base, BI_COMMAND_LINE,
kernel_cmdline);
}
/* load initrd */
if (initrd_filename) {
initrd_size = get_image_size(initrd_filename);
if (initrd_size < 0) {
error_report("could not load initial ram disk '%s'",
initrd_filename);
exit(1);
}
initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;
load_image_targphys(initrd_filename, initrd_base,
ram_size - initrd_base);
BOOTINFO2(cs->as, parameters_base, BI_RAMDISK, initrd_base,
initrd_size);
} else {
initrd_base = 0;
initrd_size = 0;
}
BOOTINFO0(cs->as, parameters_base, BI_LAST);
} else {
uint8_t *ptr;
/* allocate and load BIOS */
rom = g_malloc(sizeof(*rom));
memory_region_init_ram(rom, NULL, "m68k_mac.rom", MACROM_SIZE,
&error_abort);
if (bios_name == NULL) {
bios_name = MACROM_FILENAME;
}
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom);
/* Load MacROM binary */
if (filename) {
bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE);
g_free(filename);
} else {
bios_size = -1;
}
/* Remove qtest_enabled() check once firmware files are in the tree */
if (!qtest_enabled()) {
if (bios_size < 0 || bios_size > MACROM_SIZE) {
error_report("could not load MacROM '%s'", bios_name);
exit(1);
}
ptr = rom_ptr(MACROM_ADDR, MACROM_SIZE);
stl_phys(cs->as, 0, ldl_p(ptr)); /* reset initial SP */
stl_phys(cs->as, 4,
MACROM_ADDR + ldl_p(ptr + 4)); /* reset initial PC */
}
}
}
static void q800_machine_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
mc->desc = "Macintosh Quadra 800";
mc->init = q800_init;
mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
mc->max_cpus = 1;
mc->is_default = 0;
mc->block_default_type = IF_SCSI;
}
static const TypeInfo q800_machine_typeinfo = {
.name = MACHINE_TYPE_NAME("q800"),
.parent = TYPE_MACHINE,
.class_init = q800_machine_class_init,
};
static void q800_machine_register_types(void)
{
type_register_static(&q800_machine_typeinfo);
}
type_init(q800_machine_register_types)
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