90260c6c09
Except for the case of setting the IOTLB entry in TCG mode, we can avoid the subpage dispatching handlers and do the resolution directly on address_space_lookup_region. An IOTLB entry describes a full page, not only the region that the first access to a sub-divided page may return. This patch therefore introduces a special translation function, address_space_translate_for_iotlb, that avoids the subpage resolutions. In contrast, callers of the existing address_space_translate service will now always receive the terminal memory region section. This will be important for breaking the BQL and for enabling unaligned memory region. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
49 lines
1.9 KiB
C
49 lines
1.9 KiB
C
/*
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* Common CPU TLB handling
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef CPUTLB_H
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#define CPUTLB_H
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#if !defined(CONFIG_USER_ONLY)
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/* cputlb.c */
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void tlb_protect_code(ram_addr_t ram_addr);
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void tlb_unprotect_code_phys(CPUArchState *env, ram_addr_t ram_addr,
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target_ulong vaddr);
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void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry, uintptr_t start,
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uintptr_t length);
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void cpu_tlb_reset_dirty_all(ram_addr_t start1, ram_addr_t length);
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void tlb_set_dirty(CPUArchState *env, target_ulong vaddr);
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extern int tlb_flush_count;
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/* exec.c */
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void tb_flush_jmp_cache(CPUArchState *env, target_ulong addr);
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MemoryRegionSection *
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address_space_translate_for_iotlb(AddressSpace *as, hwaddr addr, hwaddr *xlat,
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hwaddr *plen);
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hwaddr memory_region_section_get_iotlb(CPUArchState *env,
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MemoryRegionSection *section,
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target_ulong vaddr,
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hwaddr paddr, hwaddr xlat,
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int prot,
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target_ulong *address);
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bool memory_region_is_unassigned(MemoryRegion *mr);
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#endif
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#endif
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