045e0405cd
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1612763186-18161-7-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
84 lines
2.8 KiB
C
84 lines
2.8 KiB
C
/*
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* Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef HEXAGON_REGS_H
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#define HEXAGON_REGS_H
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enum {
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HEX_REG_R00 = 0,
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HEX_REG_R01 = 1,
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HEX_REG_R02 = 2,
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HEX_REG_R03 = 3,
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HEX_REG_R04 = 4,
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HEX_REG_R05 = 5,
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HEX_REG_R06 = 6,
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HEX_REG_R07 = 7,
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HEX_REG_R08 = 8,
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HEX_REG_R09 = 9,
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HEX_REG_R10 = 10,
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HEX_REG_R11 = 11,
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HEX_REG_R12 = 12,
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HEX_REG_R13 = 13,
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HEX_REG_R14 = 14,
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HEX_REG_R15 = 15,
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HEX_REG_R16 = 16,
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HEX_REG_R17 = 17,
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HEX_REG_R18 = 18,
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HEX_REG_R19 = 19,
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HEX_REG_R20 = 20,
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HEX_REG_R21 = 21,
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HEX_REG_R22 = 22,
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HEX_REG_R23 = 23,
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HEX_REG_R24 = 24,
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HEX_REG_R25 = 25,
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HEX_REG_R26 = 26,
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HEX_REG_R27 = 27,
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HEX_REG_R28 = 28,
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HEX_REG_R29 = 29,
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HEX_REG_SP = 29,
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HEX_REG_FP = 30,
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HEX_REG_R30 = 30,
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HEX_REG_LR = 31,
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HEX_REG_R31 = 31,
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HEX_REG_SA0 = 32,
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HEX_REG_LC0 = 33,
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HEX_REG_SA1 = 34,
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HEX_REG_LC1 = 35,
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HEX_REG_P3_0 = 36,
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HEX_REG_M0 = 38,
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HEX_REG_M1 = 39,
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HEX_REG_USR = 40,
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HEX_REG_PC = 41,
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HEX_REG_UGP = 42,
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HEX_REG_GP = 43,
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HEX_REG_CS0 = 44,
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HEX_REG_CS1 = 45,
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HEX_REG_UPCYCLELO = 46,
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HEX_REG_UPCYCLEHI = 47,
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HEX_REG_FRAMELIMIT = 48,
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HEX_REG_FRAMEKEY = 49,
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HEX_REG_PKTCNTLO = 50,
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HEX_REG_PKTCNTHI = 51,
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/* Use reserved control registers for qemu execution counts */
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HEX_REG_QEMU_PKT_CNT = 52,
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HEX_REG_QEMU_INSN_CNT = 53,
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HEX_REG_UTIMERLO = 62,
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HEX_REG_UTIMERHI = 63,
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};
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#endif
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