12517bc978
The SRC device is normally used to start the secondary CPU. When running Linux directly, QEMU is emulating a PSCI interface that UBOOT is installing at boot time and therefore the fact that the SRC device is unimplemented is hidden as Qemu respond directly to PSCI requets without using the SRC device. But if you try to run a more bare metal application (maybe uboot itself), then it is not possible to start the secondary CPU as the SRC is an unimplemented device. This patch adds the ability to start the secondary CPU through the SRC device so that you can use this feature in bare metal applications. Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: ce9a0162defd2acee5dc7f8a674743de0cded569.1692964892.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
67 lines
1.4 KiB
C
67 lines
1.4 KiB
C
/*
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* IMX7 System Reset Controller
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*
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* Copyright (C) 2023 Jean-Christophe Dubois <jcd@tribudubois.net>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef IMX7_SRC_H
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#define IMX7_SRC_H
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#include "hw/sysbus.h"
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#include "qemu/bitops.h"
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#include "qom/object.h"
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#define SRC_SCR 0
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#define SRC_A7RCR0 1
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#define SRC_A7RCR1 2
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#define SRC_M4RCR 3
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#define SRC_ERCR 5
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#define SRC_HSICPHY_RCR 7
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#define SRC_USBOPHY1_RCR 8
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#define SRC_USBOPHY2_RCR 9
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#define SRC_MPIPHY_RCR 10
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#define SRC_PCIEPHY_RCR 11
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#define SRC_SBMR1 22
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#define SRC_SRSR 23
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#define SRC_SISR 26
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#define SRC_SIMR 27
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#define SRC_SBMR2 28
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#define SRC_GPR1 29
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#define SRC_GPR2 30
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#define SRC_GPR3 31
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#define SRC_GPR4 32
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#define SRC_GPR5 33
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#define SRC_GPR6 34
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#define SRC_GPR7 35
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#define SRC_GPR8 36
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#define SRC_GPR9 37
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#define SRC_GPR10 38
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#define SRC_MAX 39
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/* SRC_A7SCR1 */
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#define R_CORE1_ENABLE_SHIFT 1
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#define R_CORE1_ENABLE_LENGTH 1
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/* SRC_A7SCR0 */
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#define R_CORE1_RST_SHIFT 5
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#define R_CORE1_RST_LENGTH 1
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#define R_CORE0_RST_SHIFT 4
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#define R_CORE0_RST_LENGTH 1
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#define TYPE_IMX7_SRC "imx7.src"
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OBJECT_DECLARE_SIMPLE_TYPE(IMX7SRCState, IMX7_SRC)
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struct IMX7SRCState {
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/* <private> */
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SysBusDevice parent_obj;
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/* <public> */
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MemoryRegion iomem;
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uint32_t regs[SRC_MAX];
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};
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#endif /* IMX7_SRC_H */
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