9940c3236f
Simplify the interrupt handling by having a single callback on irq&msi cases. Remove usage of CharDriver, replace it with qemu_set_fd_handler(). Use event_notifier_test_and_clear() to read the eventfd. Before this patch, ivshmem writes the first byte received to s->intrstatus. But ivshmem_device_spec.txt says "The status register is set to 1 when an interrupt occurs." Fortunately, the byte usually comes from another ivshmem device, and those always write 1. After this commit, follows the specification, set to 1 when an interrupt occurs. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Markus Armbruster <armbru@redhat.com>
1187 lines
32 KiB
C
1187 lines
32 KiB
C
/*
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* Inter-VM Shared Memory PCI device.
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*
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* Author:
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* Cam Macdonell <cam@cs.ualberta.ca>
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*
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* Based On: cirrus_vga.c
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* Copyright (c) 2004 Fabrice Bellard
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* Copyright (c) 2004 Makoto Suzuki (suzu)
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*
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* and rtl8139.c
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* Copyright (c) 2006 Igor Kovalenko
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*
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* This code is licensed under the GNU GPL v2.
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*
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* Contributions after 2012-01-13 are licensed under the terms of the
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* GNU GPL, version 2 or (at your option) any later version.
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*/
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#include "qemu/osdep.h"
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#include "hw/hw.h"
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#include "hw/i386/pc.h"
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#include "hw/pci/pci.h"
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#include "hw/pci/msi.h"
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#include "hw/pci/msix.h"
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#include "sysemu/kvm.h"
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#include "migration/migration.h"
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#include "qemu/error-report.h"
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#include "qemu/event_notifier.h"
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#include "qemu/fifo8.h"
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#include "sysemu/char.h"
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#include "sysemu/hostmem.h"
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#include "qapi/visitor.h"
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#include "exec/ram_addr.h"
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#include "hw/misc/ivshmem.h"
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#include <sys/mman.h>
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#define PCI_VENDOR_ID_IVSHMEM PCI_VENDOR_ID_REDHAT_QUMRANET
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#define PCI_DEVICE_ID_IVSHMEM 0x1110
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#define IVSHMEM_MAX_PEERS G_MAXUINT16
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#define IVSHMEM_IOEVENTFD 0
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#define IVSHMEM_MSI 1
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#define IVSHMEM_PEER 0
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#define IVSHMEM_MASTER 1
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#define IVSHMEM_REG_BAR_SIZE 0x100
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//#define DEBUG_IVSHMEM
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#ifdef DEBUG_IVSHMEM
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#define IVSHMEM_DPRINTF(fmt, ...) \
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do {printf("IVSHMEM: " fmt, ## __VA_ARGS__); } while (0)
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#else
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#define IVSHMEM_DPRINTF(fmt, ...)
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#endif
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#define TYPE_IVSHMEM "ivshmem"
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#define IVSHMEM(obj) \
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OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM)
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typedef struct Peer {
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int nb_eventfds;
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EventNotifier *eventfds;
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} Peer;
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typedef struct MSIVector {
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PCIDevice *pdev;
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int virq;
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} MSIVector;
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typedef struct IVShmemState {
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/*< private >*/
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PCIDevice parent_obj;
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/*< public >*/
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HostMemoryBackend *hostmem;
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uint32_t intrmask;
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uint32_t intrstatus;
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CharDriverState **eventfd_chr;
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CharDriverState *server_chr;
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Fifo8 incoming_fifo;
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MemoryRegion ivshmem_mmio;
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/* We might need to register the BAR before we actually have the memory.
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* So prepare a container MemoryRegion for the BAR immediately and
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* add a subregion when we have the memory.
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*/
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MemoryRegion bar;
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MemoryRegion ivshmem;
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uint64_t ivshmem_size; /* size of shared memory region */
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uint32_t ivshmem_64bit;
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Peer *peers;
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int nb_peers; /* how many peers we have space for */
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int vm_id;
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uint32_t vectors;
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uint32_t features;
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MSIVector *msi_vectors;
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Error *migration_blocker;
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char * shmobj;
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char * sizearg;
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char * role;
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int role_val; /* scalar to avoid multiple string comparisons */
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} IVShmemState;
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/* registers for the Inter-VM shared memory device */
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enum ivshmem_registers {
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INTRMASK = 0,
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INTRSTATUS = 4,
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IVPOSITION = 8,
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DOORBELL = 12,
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};
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static inline uint32_t ivshmem_has_feature(IVShmemState *ivs,
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unsigned int feature) {
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return (ivs->features & (1 << feature));
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}
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/* accessing registers - based on rtl8139 */
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static void ivshmem_update_irq(IVShmemState *s)
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{
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PCIDevice *d = PCI_DEVICE(s);
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int isr;
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isr = (s->intrstatus & s->intrmask) & 0xffffffff;
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/* don't print ISR resets */
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if (isr) {
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IVSHMEM_DPRINTF("Set IRQ to %d (%04x %04x)\n",
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isr ? 1 : 0, s->intrstatus, s->intrmask);
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}
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pci_set_irq(d, (isr != 0));
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}
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static void ivshmem_IntrMask_write(IVShmemState *s, uint32_t val)
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{
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IVSHMEM_DPRINTF("IntrMask write(w) val = 0x%04x\n", val);
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s->intrmask = val;
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ivshmem_update_irq(s);
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}
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static uint32_t ivshmem_IntrMask_read(IVShmemState *s)
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{
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uint32_t ret = s->intrmask;
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IVSHMEM_DPRINTF("intrmask read(w) val = 0x%04x\n", ret);
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return ret;
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}
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static void ivshmem_IntrStatus_write(IVShmemState *s, uint32_t val)
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{
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IVSHMEM_DPRINTF("IntrStatus write(w) val = 0x%04x\n", val);
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s->intrstatus = val;
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ivshmem_update_irq(s);
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}
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static uint32_t ivshmem_IntrStatus_read(IVShmemState *s)
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{
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uint32_t ret = s->intrstatus;
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/* reading ISR clears all interrupts */
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s->intrstatus = 0;
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ivshmem_update_irq(s);
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return ret;
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}
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static void ivshmem_io_write(void *opaque, hwaddr addr,
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uint64_t val, unsigned size)
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{
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IVShmemState *s = opaque;
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uint16_t dest = val >> 16;
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uint16_t vector = val & 0xff;
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addr &= 0xfc;
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IVSHMEM_DPRINTF("writing to addr " TARGET_FMT_plx "\n", addr);
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switch (addr)
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{
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case INTRMASK:
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ivshmem_IntrMask_write(s, val);
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break;
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case INTRSTATUS:
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ivshmem_IntrStatus_write(s, val);
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break;
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case DOORBELL:
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/* check that dest VM ID is reasonable */
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if (dest >= s->nb_peers) {
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IVSHMEM_DPRINTF("Invalid destination VM ID (%d)\n", dest);
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break;
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}
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/* check doorbell range */
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if (vector < s->peers[dest].nb_eventfds) {
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IVSHMEM_DPRINTF("Notifying VM %d on vector %d\n", dest, vector);
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event_notifier_set(&s->peers[dest].eventfds[vector]);
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} else {
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IVSHMEM_DPRINTF("Invalid destination vector %d on VM %d\n",
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vector, dest);
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}
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break;
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default:
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IVSHMEM_DPRINTF("Unhandled write " TARGET_FMT_plx "\n", addr);
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}
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}
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static uint64_t ivshmem_io_read(void *opaque, hwaddr addr,
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unsigned size)
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{
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IVShmemState *s = opaque;
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uint32_t ret;
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switch (addr)
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{
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case INTRMASK:
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ret = ivshmem_IntrMask_read(s);
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break;
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case INTRSTATUS:
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ret = ivshmem_IntrStatus_read(s);
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break;
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case IVPOSITION:
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/* return my VM ID if the memory is mapped */
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if (memory_region_is_mapped(&s->ivshmem)) {
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ret = s->vm_id;
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} else {
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ret = -1;
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}
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break;
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default:
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IVSHMEM_DPRINTF("why are we reading " TARGET_FMT_plx "\n", addr);
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ret = 0;
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}
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return ret;
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}
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static const MemoryRegionOps ivshmem_mmio_ops = {
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.read = ivshmem_io_read,
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.write = ivshmem_io_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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.impl = {
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.min_access_size = 4,
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.max_access_size = 4,
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},
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};
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static int ivshmem_can_receive(void * opaque)
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{
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return sizeof(int64_t);
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}
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static void ivshmem_event(void *opaque, int event)
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{
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IVSHMEM_DPRINTF("ivshmem_event %d\n", event);
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}
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static void ivshmem_vector_notify(void *opaque)
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{
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MSIVector *entry = opaque;
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PCIDevice *pdev = entry->pdev;
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IVShmemState *s = IVSHMEM(pdev);
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int vector = entry - s->msi_vectors;
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EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
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if (!event_notifier_test_and_clear(n)) {
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return;
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}
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IVSHMEM_DPRINTF("interrupt on vector %p %d\n", pdev, vector);
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if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
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msix_notify(pdev, vector);
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} else {
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ivshmem_IntrStatus_write(s, 1);
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}
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}
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static int ivshmem_vector_unmask(PCIDevice *dev, unsigned vector,
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MSIMessage msg)
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{
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IVShmemState *s = IVSHMEM(dev);
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EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
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MSIVector *v = &s->msi_vectors[vector];
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int ret;
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IVSHMEM_DPRINTF("vector unmask %p %d\n", dev, vector);
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ret = kvm_irqchip_update_msi_route(kvm_state, v->virq, msg, dev);
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if (ret < 0) {
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return ret;
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}
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return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, v->virq);
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}
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static void ivshmem_vector_mask(PCIDevice *dev, unsigned vector)
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{
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IVShmemState *s = IVSHMEM(dev);
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EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
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int ret;
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IVSHMEM_DPRINTF("vector mask %p %d\n", dev, vector);
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ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n,
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s->msi_vectors[vector].virq);
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if (ret != 0) {
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error_report("remove_irqfd_notifier_gsi failed");
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}
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}
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static void ivshmem_vector_poll(PCIDevice *dev,
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unsigned int vector_start,
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unsigned int vector_end)
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{
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IVShmemState *s = IVSHMEM(dev);
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unsigned int vector;
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IVSHMEM_DPRINTF("vector poll %p %d-%d\n", dev, vector_start, vector_end);
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vector_end = MIN(vector_end, s->vectors);
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for (vector = vector_start; vector < vector_end; vector++) {
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EventNotifier *notifier = &s->peers[s->vm_id].eventfds[vector];
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if (!msix_is_masked(dev, vector)) {
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continue;
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}
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if (event_notifier_test_and_clear(notifier)) {
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msix_set_pending(dev, vector);
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}
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}
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}
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static void watch_vector_notifier(IVShmemState *s, EventNotifier *n,
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int vector)
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{
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int eventfd = event_notifier_get_fd(n);
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/* if MSI is supported we need multiple interrupts */
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s->msi_vectors[vector].pdev = PCI_DEVICE(s);
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qemu_set_fd_handler(eventfd, ivshmem_vector_notify,
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NULL, &s->msi_vectors[vector]);
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}
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static int check_shm_size(IVShmemState *s, int fd, Error **errp)
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{
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/* check that the guest isn't going to try and map more memory than the
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* the object has allocated return -1 to indicate error */
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struct stat buf;
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if (fstat(fd, &buf) < 0) {
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error_setg(errp, "exiting: fstat on fd %d failed: %s",
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fd, strerror(errno));
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return -1;
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}
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if (s->ivshmem_size > buf.st_size) {
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error_setg(errp, "Requested memory size greater"
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" than shared object size (%" PRIu64 " > %" PRIu64")",
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s->ivshmem_size, (uint64_t)buf.st_size);
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return -1;
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} else {
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return 0;
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}
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}
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/* create the shared memory BAR when we are not using the server, so we can
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* create the BAR and map the memory immediately */
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static int create_shared_memory_BAR(IVShmemState *s, int fd, uint8_t attr,
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Error **errp)
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{
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void * ptr;
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ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
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if (ptr == MAP_FAILED) {
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error_setg_errno(errp, errno, "Failed to mmap shared memory");
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return -1;
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}
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memory_region_init_ram_ptr(&s->ivshmem, OBJECT(s), "ivshmem.bar2",
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s->ivshmem_size, ptr);
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qemu_set_ram_fd(s->ivshmem.ram_addr, fd);
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vmstate_register_ram(&s->ivshmem, DEVICE(s));
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memory_region_add_subregion(&s->bar, 0, &s->ivshmem);
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/* region for shared memory */
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pci_register_bar(PCI_DEVICE(s), 2, attr, &s->bar);
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return 0;
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}
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static void ivshmem_add_eventfd(IVShmemState *s, int posn, int i)
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{
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memory_region_add_eventfd(&s->ivshmem_mmio,
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DOORBELL,
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4,
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true,
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(posn << 16) | i,
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&s->peers[posn].eventfds[i]);
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}
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static void ivshmem_del_eventfd(IVShmemState *s, int posn, int i)
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{
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memory_region_del_eventfd(&s->ivshmem_mmio,
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DOORBELL,
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4,
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true,
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(posn << 16) | i,
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&s->peers[posn].eventfds[i]);
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}
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static void close_peer_eventfds(IVShmemState *s, int posn)
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{
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int i, n;
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if (!ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
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return;
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}
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if (posn < 0 || posn >= s->nb_peers) {
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error_report("invalid peer %d", posn);
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return;
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}
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n = s->peers[posn].nb_eventfds;
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memory_region_transaction_begin();
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for (i = 0; i < n; i++) {
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ivshmem_del_eventfd(s, posn, i);
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}
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memory_region_transaction_commit();
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for (i = 0; i < n; i++) {
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event_notifier_cleanup(&s->peers[posn].eventfds[i]);
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}
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g_free(s->peers[posn].eventfds);
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s->peers[posn].nb_eventfds = 0;
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}
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/* this function increase the dynamic storage need to store data about other
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* peers */
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static int resize_peers(IVShmemState *s, int new_min_size)
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{
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int j, old_size;
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/* limit number of max peers */
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if (new_min_size <= 0 || new_min_size > IVSHMEM_MAX_PEERS) {
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return -1;
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}
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if (new_min_size <= s->nb_peers) {
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return 0;
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}
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old_size = s->nb_peers;
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s->nb_peers = new_min_size;
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IVSHMEM_DPRINTF("bumping storage to %d peers\n", s->nb_peers);
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s->peers = g_realloc(s->peers, s->nb_peers * sizeof(Peer));
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for (j = old_size; j < s->nb_peers; j++) {
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s->peers[j].eventfds = g_new0(EventNotifier, s->vectors);
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s->peers[j].nb_eventfds = 0;
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}
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return 0;
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}
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static bool fifo_update_and_get(IVShmemState *s, const uint8_t *buf, int size,
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void *data, size_t len)
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{
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const uint8_t *p;
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uint32_t num;
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assert(len <= sizeof(int64_t)); /* limitation of the fifo */
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if (fifo8_is_empty(&s->incoming_fifo) && size == len) {
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memcpy(data, buf, size);
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return true;
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}
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IVSHMEM_DPRINTF("short read of %d bytes\n", size);
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num = MIN(size, sizeof(int64_t) - fifo8_num_used(&s->incoming_fifo));
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fifo8_push_all(&s->incoming_fifo, buf, num);
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if (fifo8_num_used(&s->incoming_fifo) < len) {
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assert(num == 0);
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return false;
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}
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size -= num;
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buf += num;
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p = fifo8_pop_buf(&s->incoming_fifo, len, &num);
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assert(num == len);
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|
memcpy(data, p, len);
|
|
|
|
if (size > 0) {
|
|
fifo8_push_all(&s->incoming_fifo, buf, size);
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
static bool fifo_update_and_get_i64(IVShmemState *s,
|
|
const uint8_t *buf, int size, int64_t *i64)
|
|
{
|
|
if (fifo_update_and_get(s, buf, size, i64, sizeof(*i64))) {
|
|
*i64 = GINT64_FROM_LE(*i64);
|
|
return true;
|
|
}
|
|
|
|
return false;
|
|
}
|
|
|
|
static int ivshmem_add_kvm_msi_virq(IVShmemState *s, int vector)
|
|
{
|
|
PCIDevice *pdev = PCI_DEVICE(s);
|
|
MSIMessage msg = msix_get_message(pdev, vector);
|
|
int ret;
|
|
|
|
IVSHMEM_DPRINTF("ivshmem_add_kvm_msi_virq vector:%d\n", vector);
|
|
|
|
if (s->msi_vectors[vector].pdev != NULL) {
|
|
return 0;
|
|
}
|
|
|
|
ret = kvm_irqchip_add_msi_route(kvm_state, msg, pdev);
|
|
if (ret < 0) {
|
|
error_report("ivshmem: kvm_irqchip_add_msi_route failed");
|
|
return -1;
|
|
}
|
|
|
|
s->msi_vectors[vector].virq = ret;
|
|
s->msi_vectors[vector].pdev = pdev;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void setup_interrupt(IVShmemState *s, int vector)
|
|
{
|
|
EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
|
|
bool with_irqfd = kvm_msi_via_irqfd_enabled() &&
|
|
ivshmem_has_feature(s, IVSHMEM_MSI);
|
|
PCIDevice *pdev = PCI_DEVICE(s);
|
|
|
|
IVSHMEM_DPRINTF("setting up interrupt for vector: %d\n", vector);
|
|
|
|
if (!with_irqfd) {
|
|
IVSHMEM_DPRINTF("with eventfd");
|
|
watch_vector_notifier(s, n, vector);
|
|
} else if (msix_enabled(pdev)) {
|
|
IVSHMEM_DPRINTF("with irqfd");
|
|
if (ivshmem_add_kvm_msi_virq(s, vector) < 0) {
|
|
return;
|
|
}
|
|
|
|
if (!msix_is_masked(pdev, vector)) {
|
|
kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL,
|
|
s->msi_vectors[vector].virq);
|
|
}
|
|
} else {
|
|
/* it will be delayed until msix is enabled, in write_config */
|
|
IVSHMEM_DPRINTF("with irqfd, delayed until msix enabled");
|
|
}
|
|
}
|
|
|
|
static void ivshmem_read(void *opaque, const uint8_t *buf, int size)
|
|
{
|
|
IVShmemState *s = opaque;
|
|
int incoming_fd;
|
|
int new_eventfd;
|
|
int64_t incoming_posn;
|
|
Error *err = NULL;
|
|
Peer *peer;
|
|
|
|
if (!fifo_update_and_get_i64(s, buf, size, &incoming_posn)) {
|
|
return;
|
|
}
|
|
|
|
if (incoming_posn < -1) {
|
|
IVSHMEM_DPRINTF("invalid incoming_posn %" PRId64 "\n", incoming_posn);
|
|
return;
|
|
}
|
|
|
|
/* pick off s->server_chr->msgfd and store it, posn should accompany msg */
|
|
incoming_fd = qemu_chr_fe_get_msgfd(s->server_chr);
|
|
IVSHMEM_DPRINTF("posn is %" PRId64 ", fd is %d\n",
|
|
incoming_posn, incoming_fd);
|
|
|
|
/* make sure we have enough space for this peer */
|
|
if (incoming_posn >= s->nb_peers) {
|
|
if (resize_peers(s, incoming_posn + 1) < 0) {
|
|
error_report("failed to resize peers array");
|
|
if (incoming_fd != -1) {
|
|
close(incoming_fd);
|
|
}
|
|
return;
|
|
}
|
|
}
|
|
|
|
peer = &s->peers[incoming_posn];
|
|
|
|
if (incoming_fd == -1) {
|
|
/* if posn is positive and unseen before then this is our posn*/
|
|
if (incoming_posn >= 0 && s->vm_id == -1) {
|
|
/* receive our posn */
|
|
s->vm_id = incoming_posn;
|
|
} else {
|
|
/* otherwise an fd == -1 means an existing peer has gone away */
|
|
IVSHMEM_DPRINTF("posn %" PRId64 " has gone away\n", incoming_posn);
|
|
close_peer_eventfds(s, incoming_posn);
|
|
}
|
|
return;
|
|
}
|
|
|
|
/* if the position is -1, then it's shared memory region fd */
|
|
if (incoming_posn == -1) {
|
|
void * map_ptr;
|
|
|
|
if (memory_region_is_mapped(&s->ivshmem)) {
|
|
error_report("shm already initialized");
|
|
close(incoming_fd);
|
|
return;
|
|
}
|
|
|
|
if (check_shm_size(s, incoming_fd, &err) == -1) {
|
|
error_report_err(err);
|
|
close(incoming_fd);
|
|
return;
|
|
}
|
|
|
|
/* mmap the region and map into the BAR2 */
|
|
map_ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED,
|
|
incoming_fd, 0);
|
|
if (map_ptr == MAP_FAILED) {
|
|
error_report("Failed to mmap shared memory %s", strerror(errno));
|
|
close(incoming_fd);
|
|
return;
|
|
}
|
|
memory_region_init_ram_ptr(&s->ivshmem, OBJECT(s),
|
|
"ivshmem.bar2", s->ivshmem_size, map_ptr);
|
|
qemu_set_ram_fd(s->ivshmem.ram_addr, incoming_fd);
|
|
vmstate_register_ram(&s->ivshmem, DEVICE(s));
|
|
|
|
IVSHMEM_DPRINTF("guest h/w addr = %p, size = %" PRIu64 "\n",
|
|
map_ptr, s->ivshmem_size);
|
|
|
|
memory_region_add_subregion(&s->bar, 0, &s->ivshmem);
|
|
|
|
return;
|
|
}
|
|
|
|
/* each peer has an associated array of eventfds, and we keep
|
|
* track of how many eventfds received so far */
|
|
/* get a new eventfd: */
|
|
if (peer->nb_eventfds >= s->vectors) {
|
|
error_report("Too many eventfd received, device has %d vectors",
|
|
s->vectors);
|
|
close(incoming_fd);
|
|
return;
|
|
}
|
|
|
|
new_eventfd = peer->nb_eventfds++;
|
|
|
|
/* this is an eventfd for a particular peer VM */
|
|
IVSHMEM_DPRINTF("eventfds[%" PRId64 "][%d] = %d\n", incoming_posn,
|
|
new_eventfd, incoming_fd);
|
|
event_notifier_init_fd(&peer->eventfds[new_eventfd], incoming_fd);
|
|
fcntl_setfl(incoming_fd, O_NONBLOCK); /* msix/irqfd poll non block */
|
|
|
|
if (incoming_posn == s->vm_id) {
|
|
setup_interrupt(s, new_eventfd);
|
|
}
|
|
|
|
if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
|
|
ivshmem_add_eventfd(s, incoming_posn, new_eventfd);
|
|
}
|
|
}
|
|
|
|
static void ivshmem_check_version(void *opaque, const uint8_t * buf, int size)
|
|
{
|
|
IVShmemState *s = opaque;
|
|
int tmp;
|
|
int64_t version;
|
|
|
|
if (!fifo_update_and_get_i64(s, buf, size, &version)) {
|
|
return;
|
|
}
|
|
|
|
tmp = qemu_chr_fe_get_msgfd(s->server_chr);
|
|
if (tmp != -1 || version != IVSHMEM_PROTOCOL_VERSION) {
|
|
fprintf(stderr, "incompatible version, you are connecting to a ivshmem-"
|
|
"server using a different protocol please check your setup\n");
|
|
qemu_chr_delete(s->server_chr);
|
|
s->server_chr = NULL;
|
|
return;
|
|
}
|
|
|
|
IVSHMEM_DPRINTF("version check ok, switch to real chardev handler\n");
|
|
qemu_chr_add_handlers(s->server_chr, ivshmem_can_receive, ivshmem_read,
|
|
ivshmem_event, s);
|
|
}
|
|
|
|
/* Select the MSI-X vectors used by device.
|
|
* ivshmem maps events to vectors statically, so
|
|
* we just enable all vectors on init and after reset. */
|
|
static void ivshmem_use_msix(IVShmemState * s)
|
|
{
|
|
PCIDevice *d = PCI_DEVICE(s);
|
|
int i;
|
|
|
|
IVSHMEM_DPRINTF("%s, msix present: %d\n", __func__, msix_present(d));
|
|
if (!msix_present(d)) {
|
|
return;
|
|
}
|
|
|
|
for (i = 0; i < s->vectors; i++) {
|
|
msix_vector_use(d, i);
|
|
}
|
|
}
|
|
|
|
static void ivshmem_reset(DeviceState *d)
|
|
{
|
|
IVShmemState *s = IVSHMEM(d);
|
|
|
|
s->intrstatus = 0;
|
|
s->intrmask = 0;
|
|
ivshmem_use_msix(s);
|
|
}
|
|
|
|
static int ivshmem_setup_interrupts(IVShmemState *s)
|
|
{
|
|
/* allocate QEMU callback data for receiving interrupts */
|
|
s->msi_vectors = g_malloc0(s->vectors * sizeof(MSIVector));
|
|
|
|
if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
|
|
if (msix_init_exclusive_bar(PCI_DEVICE(s), s->vectors, 1)) {
|
|
return -1;
|
|
}
|
|
|
|
IVSHMEM_DPRINTF("msix initialized (%d vectors)\n", s->vectors);
|
|
ivshmem_use_msix(s);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void ivshmem_enable_irqfd(IVShmemState *s)
|
|
{
|
|
PCIDevice *pdev = PCI_DEVICE(s);
|
|
int i;
|
|
|
|
for (i = 0; i < s->peers[s->vm_id].nb_eventfds; i++) {
|
|
ivshmem_add_kvm_msi_virq(s, i);
|
|
}
|
|
|
|
if (msix_set_vector_notifiers(pdev,
|
|
ivshmem_vector_unmask,
|
|
ivshmem_vector_mask,
|
|
ivshmem_vector_poll)) {
|
|
error_report("ivshmem: msix_set_vector_notifiers failed");
|
|
}
|
|
}
|
|
|
|
static void ivshmem_remove_kvm_msi_virq(IVShmemState *s, int vector)
|
|
{
|
|
IVSHMEM_DPRINTF("ivshmem_remove_kvm_msi_virq vector:%d\n", vector);
|
|
|
|
if (s->msi_vectors[vector].pdev == NULL) {
|
|
return;
|
|
}
|
|
|
|
/* it was cleaned when masked in the frontend. */
|
|
kvm_irqchip_release_virq(kvm_state, s->msi_vectors[vector].virq);
|
|
|
|
s->msi_vectors[vector].pdev = NULL;
|
|
}
|
|
|
|
static void ivshmem_disable_irqfd(IVShmemState *s)
|
|
{
|
|
PCIDevice *pdev = PCI_DEVICE(s);
|
|
int i;
|
|
|
|
for (i = 0; i < s->peers[s->vm_id].nb_eventfds; i++) {
|
|
ivshmem_remove_kvm_msi_virq(s, i);
|
|
}
|
|
|
|
msix_unset_vector_notifiers(pdev);
|
|
}
|
|
|
|
static void ivshmem_write_config(PCIDevice *pdev, uint32_t address,
|
|
uint32_t val, int len)
|
|
{
|
|
IVShmemState *s = IVSHMEM(pdev);
|
|
int is_enabled, was_enabled = msix_enabled(pdev);
|
|
|
|
pci_default_write_config(pdev, address, val, len);
|
|
is_enabled = msix_enabled(pdev);
|
|
|
|
if (kvm_msi_via_irqfd_enabled() && s->vm_id != -1) {
|
|
if (!was_enabled && is_enabled) {
|
|
ivshmem_enable_irqfd(s);
|
|
} else if (was_enabled && !is_enabled) {
|
|
ivshmem_disable_irqfd(s);
|
|
}
|
|
}
|
|
}
|
|
|
|
static void pci_ivshmem_realize(PCIDevice *dev, Error **errp)
|
|
{
|
|
IVShmemState *s = IVSHMEM(dev);
|
|
uint8_t *pci_conf;
|
|
uint8_t attr = PCI_BASE_ADDRESS_SPACE_MEMORY |
|
|
PCI_BASE_ADDRESS_MEM_PREFETCH;
|
|
|
|
if (!!s->server_chr + !!s->shmobj + !!s->hostmem != 1) {
|
|
error_setg(errp,
|
|
"You must specify either 'shm', 'chardev' or 'x-memdev'");
|
|
return;
|
|
}
|
|
|
|
if (s->hostmem) {
|
|
MemoryRegion *mr;
|
|
|
|
if (s->sizearg) {
|
|
g_warning("size argument ignored with hostmem");
|
|
}
|
|
|
|
mr = host_memory_backend_get_memory(s->hostmem, errp);
|
|
s->ivshmem_size = memory_region_size(mr);
|
|
} else if (s->sizearg == NULL) {
|
|
s->ivshmem_size = 4 << 20; /* 4 MB default */
|
|
} else {
|
|
char *end;
|
|
int64_t size = qemu_strtosz(s->sizearg, &end);
|
|
if (size < 0 || *end != '\0' || !is_power_of_2(size)) {
|
|
error_setg(errp, "Invalid size %s", s->sizearg);
|
|
return;
|
|
}
|
|
s->ivshmem_size = size;
|
|
}
|
|
|
|
fifo8_create(&s->incoming_fifo, sizeof(int64_t));
|
|
|
|
/* IRQFD requires MSI */
|
|
if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD) &&
|
|
!ivshmem_has_feature(s, IVSHMEM_MSI)) {
|
|
error_setg(errp, "ioeventfd/irqfd requires MSI");
|
|
return;
|
|
}
|
|
|
|
/* check that role is reasonable */
|
|
if (s->role) {
|
|
if (strncmp(s->role, "peer", 5) == 0) {
|
|
s->role_val = IVSHMEM_PEER;
|
|
} else if (strncmp(s->role, "master", 7) == 0) {
|
|
s->role_val = IVSHMEM_MASTER;
|
|
} else {
|
|
error_setg(errp, "'role' must be 'peer' or 'master'");
|
|
return;
|
|
}
|
|
} else {
|
|
s->role_val = IVSHMEM_MASTER; /* default */
|
|
}
|
|
|
|
if (s->role_val == IVSHMEM_PEER) {
|
|
error_setg(&s->migration_blocker,
|
|
"Migration is disabled when using feature 'peer mode' in device 'ivshmem'");
|
|
migrate_add_blocker(s->migration_blocker);
|
|
}
|
|
|
|
pci_conf = dev->config;
|
|
pci_conf[PCI_COMMAND] = PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
|
|
|
|
pci_config_set_interrupt_pin(pci_conf, 1);
|
|
|
|
memory_region_init_io(&s->ivshmem_mmio, OBJECT(s), &ivshmem_mmio_ops, s,
|
|
"ivshmem-mmio", IVSHMEM_REG_BAR_SIZE);
|
|
|
|
/* region for registers*/
|
|
pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY,
|
|
&s->ivshmem_mmio);
|
|
|
|
memory_region_init(&s->bar, OBJECT(s), "ivshmem-bar2-container", s->ivshmem_size);
|
|
if (s->ivshmem_64bit) {
|
|
attr |= PCI_BASE_ADDRESS_MEM_TYPE_64;
|
|
}
|
|
|
|
if (s->hostmem != NULL) {
|
|
MemoryRegion *mr;
|
|
|
|
IVSHMEM_DPRINTF("using hostmem\n");
|
|
|
|
mr = host_memory_backend_get_memory(MEMORY_BACKEND(s->hostmem), errp);
|
|
vmstate_register_ram(mr, DEVICE(s));
|
|
memory_region_add_subregion(&s->bar, 0, mr);
|
|
pci_register_bar(PCI_DEVICE(s), 2, attr, &s->bar);
|
|
} else if (s->server_chr != NULL) {
|
|
/* FIXME do not rely on what chr drivers put into filename */
|
|
if (strncmp(s->server_chr->filename, "unix:", 5)) {
|
|
error_setg(errp, "chardev is not a unix client socket");
|
|
return;
|
|
}
|
|
|
|
/* if we get a UNIX socket as the parameter we will talk
|
|
* to the ivshmem server to receive the memory region */
|
|
|
|
IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n",
|
|
s->server_chr->filename);
|
|
|
|
if (ivshmem_setup_interrupts(s) < 0) {
|
|
error_setg(errp, "failed to initialize interrupts");
|
|
return;
|
|
}
|
|
|
|
/* we allocate enough space for 16 peers and grow as needed */
|
|
resize_peers(s, 16);
|
|
s->vm_id = -1;
|
|
|
|
pci_register_bar(dev, 2, attr, &s->bar);
|
|
|
|
s->eventfd_chr = g_malloc0(s->vectors * sizeof(CharDriverState *));
|
|
|
|
qemu_chr_add_handlers(s->server_chr, ivshmem_can_receive,
|
|
ivshmem_check_version, ivshmem_event, s);
|
|
} else {
|
|
/* just map the file immediately, we're not using a server */
|
|
int fd;
|
|
|
|
IVSHMEM_DPRINTF("using shm_open (shm object = %s)\n", s->shmobj);
|
|
|
|
/* try opening with O_EXCL and if it succeeds zero the memory
|
|
* by truncating to 0 */
|
|
if ((fd = shm_open(s->shmobj, O_CREAT|O_RDWR|O_EXCL,
|
|
S_IRWXU|S_IRWXG|S_IRWXO)) > 0) {
|
|
/* truncate file to length PCI device's memory */
|
|
if (ftruncate(fd, s->ivshmem_size) != 0) {
|
|
error_report("could not truncate shared file");
|
|
}
|
|
|
|
} else if ((fd = shm_open(s->shmobj, O_CREAT|O_RDWR,
|
|
S_IRWXU|S_IRWXG|S_IRWXO)) < 0) {
|
|
error_setg(errp, "could not open shared file");
|
|
return;
|
|
}
|
|
|
|
if (check_shm_size(s, fd, errp) == -1) {
|
|
return;
|
|
}
|
|
|
|
create_shared_memory_BAR(s, fd, attr, errp);
|
|
}
|
|
}
|
|
|
|
static void pci_ivshmem_exit(PCIDevice *dev)
|
|
{
|
|
IVShmemState *s = IVSHMEM(dev);
|
|
int i;
|
|
|
|
fifo8_destroy(&s->incoming_fifo);
|
|
|
|
if (s->migration_blocker) {
|
|
migrate_del_blocker(s->migration_blocker);
|
|
error_free(s->migration_blocker);
|
|
}
|
|
|
|
if (memory_region_is_mapped(&s->ivshmem)) {
|
|
if (!s->hostmem) {
|
|
void *addr = memory_region_get_ram_ptr(&s->ivshmem);
|
|
int fd;
|
|
|
|
if (munmap(addr, s->ivshmem_size) == -1) {
|
|
error_report("Failed to munmap shared memory %s",
|
|
strerror(errno));
|
|
}
|
|
|
|
if ((fd = qemu_get_ram_fd(s->ivshmem.ram_addr)) != -1)
|
|
close(fd);
|
|
}
|
|
|
|
vmstate_unregister_ram(&s->ivshmem, DEVICE(dev));
|
|
memory_region_del_subregion(&s->bar, &s->ivshmem);
|
|
}
|
|
|
|
if (s->eventfd_chr) {
|
|
for (i = 0; i < s->vectors; i++) {
|
|
if (s->eventfd_chr[i]) {
|
|
qemu_chr_free(s->eventfd_chr[i]);
|
|
}
|
|
}
|
|
g_free(s->eventfd_chr);
|
|
}
|
|
|
|
if (s->peers) {
|
|
for (i = 0; i < s->nb_peers; i++) {
|
|
close_peer_eventfds(s, i);
|
|
}
|
|
g_free(s->peers);
|
|
}
|
|
|
|
if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
|
|
msix_uninit_exclusive_bar(dev);
|
|
}
|
|
|
|
g_free(s->msi_vectors);
|
|
}
|
|
|
|
static bool test_msix(void *opaque, int version_id)
|
|
{
|
|
IVShmemState *s = opaque;
|
|
|
|
return ivshmem_has_feature(s, IVSHMEM_MSI);
|
|
}
|
|
|
|
static bool test_no_msix(void *opaque, int version_id)
|
|
{
|
|
return !test_msix(opaque, version_id);
|
|
}
|
|
|
|
static int ivshmem_pre_load(void *opaque)
|
|
{
|
|
IVShmemState *s = opaque;
|
|
|
|
if (s->role_val == IVSHMEM_PEER) {
|
|
error_report("'peer' devices are not migratable");
|
|
return -EINVAL;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ivshmem_post_load(void *opaque, int version_id)
|
|
{
|
|
IVShmemState *s = opaque;
|
|
|
|
if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
|
|
ivshmem_use_msix(s);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ivshmem_load_old(QEMUFile *f, void *opaque, int version_id)
|
|
{
|
|
IVShmemState *s = opaque;
|
|
PCIDevice *pdev = PCI_DEVICE(s);
|
|
int ret;
|
|
|
|
IVSHMEM_DPRINTF("ivshmem_load_old\n");
|
|
|
|
if (version_id != 0) {
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (s->role_val == IVSHMEM_PEER) {
|
|
error_report("'peer' devices are not migratable");
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = pci_device_load(pdev, f);
|
|
if (ret) {
|
|
return ret;
|
|
}
|
|
|
|
if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
|
|
msix_load(pdev, f);
|
|
ivshmem_use_msix(s);
|
|
} else {
|
|
s->intrstatus = qemu_get_be32(f);
|
|
s->intrmask = qemu_get_be32(f);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const VMStateDescription ivshmem_vmsd = {
|
|
.name = "ivshmem",
|
|
.version_id = 1,
|
|
.minimum_version_id = 1,
|
|
.pre_load = ivshmem_pre_load,
|
|
.post_load = ivshmem_post_load,
|
|
.fields = (VMStateField[]) {
|
|
VMSTATE_PCI_DEVICE(parent_obj, IVShmemState),
|
|
|
|
VMSTATE_MSIX_TEST(parent_obj, IVShmemState, test_msix),
|
|
VMSTATE_UINT32_TEST(intrstatus, IVShmemState, test_no_msix),
|
|
VMSTATE_UINT32_TEST(intrmask, IVShmemState, test_no_msix),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
},
|
|
.load_state_old = ivshmem_load_old,
|
|
.minimum_version_id_old = 0
|
|
};
|
|
|
|
static Property ivshmem_properties[] = {
|
|
DEFINE_PROP_CHR("chardev", IVShmemState, server_chr),
|
|
DEFINE_PROP_STRING("size", IVShmemState, sizearg),
|
|
DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1),
|
|
DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD, false),
|
|
DEFINE_PROP_BIT("msi", IVShmemState, features, IVSHMEM_MSI, true),
|
|
DEFINE_PROP_STRING("shm", IVShmemState, shmobj),
|
|
DEFINE_PROP_STRING("role", IVShmemState, role),
|
|
DEFINE_PROP_UINT32("use64", IVShmemState, ivshmem_64bit, 1),
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
};
|
|
|
|
static void ivshmem_class_init(ObjectClass *klass, void *data)
|
|
{
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
|
|
|
|
k->realize = pci_ivshmem_realize;
|
|
k->exit = pci_ivshmem_exit;
|
|
k->config_write = ivshmem_write_config;
|
|
k->vendor_id = PCI_VENDOR_ID_IVSHMEM;
|
|
k->device_id = PCI_DEVICE_ID_IVSHMEM;
|
|
k->class_id = PCI_CLASS_MEMORY_RAM;
|
|
dc->reset = ivshmem_reset;
|
|
dc->props = ivshmem_properties;
|
|
dc->vmsd = &ivshmem_vmsd;
|
|
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
|
|
dc->desc = "Inter-VM shared memory";
|
|
}
|
|
|
|
static void ivshmem_check_memdev_is_busy(Object *obj, const char *name,
|
|
Object *val, Error **errp)
|
|
{
|
|
MemoryRegion *mr;
|
|
|
|
mr = host_memory_backend_get_memory(MEMORY_BACKEND(val), errp);
|
|
if (memory_region_is_mapped(mr)) {
|
|
char *path = object_get_canonical_path_component(val);
|
|
error_setg(errp, "can't use already busy memdev: %s", path);
|
|
g_free(path);
|
|
} else {
|
|
qdev_prop_allow_set_link_before_realize(obj, name, val, errp);
|
|
}
|
|
}
|
|
|
|
static void ivshmem_init(Object *obj)
|
|
{
|
|
IVShmemState *s = IVSHMEM(obj);
|
|
|
|
object_property_add_link(obj, "x-memdev", TYPE_MEMORY_BACKEND,
|
|
(Object **)&s->hostmem,
|
|
ivshmem_check_memdev_is_busy,
|
|
OBJ_PROP_LINK_UNREF_ON_RELEASE,
|
|
&error_abort);
|
|
}
|
|
|
|
static const TypeInfo ivshmem_info = {
|
|
.name = TYPE_IVSHMEM,
|
|
.parent = TYPE_PCI_DEVICE,
|
|
.instance_size = sizeof(IVShmemState),
|
|
.instance_init = ivshmem_init,
|
|
.class_init = ivshmem_class_init,
|
|
};
|
|
|
|
static void ivshmem_register_types(void)
|
|
{
|
|
type_register_static(&ivshmem_info);
|
|
}
|
|
|
|
type_init(ivshmem_register_types)
|