5f36666722
On sPAPR vfio_listener_region_add() is called in 2 situations: 1. a new listener is registered from vfio_connect_container(); 2. a new IOMMU Memory Region is added from rtas_ibm_create_pe_dma_window(). In both cases vfio_listener_region_add() calls memory_region_iommu_replay() to notify newly registered IOMMU notifiers about existing mappings which is totally desirable for case 1. However for case 2 it is nothing but noop as the window has just been created and has no valid mappings so replaying those does not do anything. It is barely noticeable with usual guests but if the window happens to be really big, such no-op replay might take minutes and trigger RCU stall warnings in the guest. For example, a upcoming GPU RAM memory region mapped at 64TiB (right after SPAPR_PCI_LIMIT) causes a 64bit DMA window to be at least 128TiB which is (128<<40)/0x10000=2.147.483.648 TCEs to replay. This mitigates the problem by adding an "skipping_replay" flag to sPAPRTCETable and defining sPAPR own IOMMU MR replay() hook which does exactly the same thing as the generic one except it returns early if @skipping_replay==true. Another way of fixing this would be delaying replay till the very first H_PUT_TCE but this does not work if in-kernel H_PUT_TCE handler is enabled (a likely case). When "ibm,create-pe-dma-window" is complete, the guest will map only required regions of the huge DMA window. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Message-Id: <20190307050518.64968-2-aik@ozlabs.ru> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
292 lines
8.6 KiB
C
292 lines
8.6 KiB
C
/*
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* QEMU sPAPR Dynamic DMA windows support
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*
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* Copyright (c) 2015 Alexey Kardashevskiy, IBM Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License,
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* or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "qemu/error-report.h"
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#include "hw/ppc/spapr.h"
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#include "hw/pci-host/spapr.h"
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#include "trace.h"
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static int spapr_phb_get_active_win_num_cb(Object *child, void *opaque)
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{
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sPAPRTCETable *tcet;
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tcet = (sPAPRTCETable *) object_dynamic_cast(child, TYPE_SPAPR_TCE_TABLE);
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if (tcet && tcet->nb_table) {
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++*(unsigned *)opaque;
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}
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return 0;
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}
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static unsigned spapr_phb_get_active_win_num(sPAPRPHBState *sphb)
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{
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unsigned ret = 0;
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object_child_foreach(OBJECT(sphb), spapr_phb_get_active_win_num_cb, &ret);
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return ret;
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}
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static int spapr_phb_get_free_liobn_cb(Object *child, void *opaque)
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{
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sPAPRTCETable *tcet;
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tcet = (sPAPRTCETable *) object_dynamic_cast(child, TYPE_SPAPR_TCE_TABLE);
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if (tcet && !tcet->nb_table) {
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*(uint32_t *)opaque = tcet->liobn;
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return 1;
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}
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return 0;
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}
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static unsigned spapr_phb_get_free_liobn(sPAPRPHBState *sphb)
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{
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uint32_t liobn = 0;
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object_child_foreach(OBJECT(sphb), spapr_phb_get_free_liobn_cb, &liobn);
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return liobn;
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}
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static uint32_t spapr_page_mask_to_query_mask(uint64_t page_mask)
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{
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int i;
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uint32_t mask = 0;
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const struct { int shift; uint32_t mask; } masks[] = {
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{ 12, RTAS_DDW_PGSIZE_4K },
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{ 16, RTAS_DDW_PGSIZE_64K },
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{ 24, RTAS_DDW_PGSIZE_16M },
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{ 25, RTAS_DDW_PGSIZE_32M },
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{ 26, RTAS_DDW_PGSIZE_64M },
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{ 27, RTAS_DDW_PGSIZE_128M },
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{ 28, RTAS_DDW_PGSIZE_256M },
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{ 34, RTAS_DDW_PGSIZE_16G },
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};
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for (i = 0; i < ARRAY_SIZE(masks); ++i) {
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if (page_mask & (1ULL << masks[i].shift)) {
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mask |= masks[i].mask;
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}
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}
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return mask;
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}
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static void rtas_ibm_query_pe_dma_window(PowerPCCPU *cpu,
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sPAPRMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args,
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uint32_t nret, target_ulong rets)
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{
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sPAPRPHBState *sphb;
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uint64_t buid;
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uint32_t avail, addr, pgmask = 0;
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if ((nargs != 3) || (nret != 5)) {
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goto param_error_exit;
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}
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buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
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addr = rtas_ld(args, 0);
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sphb = spapr_pci_find_phb(spapr, buid);
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if (!sphb || !sphb->ddw_enabled) {
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goto param_error_exit;
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}
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/* Translate page mask to LoPAPR format */
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pgmask = spapr_page_mask_to_query_mask(sphb->page_size_mask);
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avail = SPAPR_PCI_DMA_MAX_WINDOWS - spapr_phb_get_active_win_num(sphb);
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rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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rtas_st(rets, 1, avail);
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rtas_st(rets, 2, 0x80000000); /* The largest window we can possibly have */
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rtas_st(rets, 3, pgmask);
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rtas_st(rets, 4, 0); /* DMA migration mask, not supported */
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trace_spapr_iommu_ddw_query(buid, addr, avail, 0x80000000, pgmask);
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return;
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param_error_exit:
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rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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}
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static void rtas_ibm_create_pe_dma_window(PowerPCCPU *cpu,
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sPAPRMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args,
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uint32_t nret, target_ulong rets)
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{
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sPAPRPHBState *sphb;
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sPAPRTCETable *tcet = NULL;
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uint32_t addr, page_shift, window_shift, liobn;
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uint64_t buid, win_addr;
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int windows;
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if ((nargs != 5) || (nret != 4)) {
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goto param_error_exit;
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}
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buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
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addr = rtas_ld(args, 0);
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sphb = spapr_pci_find_phb(spapr, buid);
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if (!sphb || !sphb->ddw_enabled) {
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goto param_error_exit;
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}
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page_shift = rtas_ld(args, 3);
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window_shift = rtas_ld(args, 4);
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liobn = spapr_phb_get_free_liobn(sphb);
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windows = spapr_phb_get_active_win_num(sphb);
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if (!(sphb->page_size_mask & (1ULL << page_shift)) ||
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(window_shift < page_shift)) {
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goto param_error_exit;
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}
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if (!liobn || !sphb->ddw_enabled || windows == SPAPR_PCI_DMA_MAX_WINDOWS) {
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goto hw_error_exit;
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}
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tcet = spapr_tce_find_by_liobn(liobn);
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if (!tcet) {
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goto hw_error_exit;
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}
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win_addr = (windows == 0) ? sphb->dma_win_addr : sphb->dma64_win_addr;
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/*
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* We have just created a window, we know for the fact that it is empty,
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* use a hack to avoid iterating over the table as it is quite possible
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* to have billions of TCEs, all empty.
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* Note that we cannot delay this to the first H_PUT_TCE as this hcall is
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* mostly likely to be handled in KVM so QEMU just does not know if it
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* happened.
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*/
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tcet->skipping_replay = true;
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spapr_tce_table_enable(tcet, page_shift, win_addr,
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1ULL << (window_shift - page_shift));
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tcet->skipping_replay = false;
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if (!tcet->nb_table) {
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goto hw_error_exit;
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}
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trace_spapr_iommu_ddw_create(buid, addr, 1ULL << page_shift,
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1ULL << window_shift, tcet->bus_offset, liobn);
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rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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rtas_st(rets, 1, liobn);
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rtas_st(rets, 2, tcet->bus_offset >> 32);
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rtas_st(rets, 3, tcet->bus_offset & ((uint32_t) -1));
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return;
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hw_error_exit:
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rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
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return;
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param_error_exit:
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rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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}
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static void rtas_ibm_remove_pe_dma_window(PowerPCCPU *cpu,
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sPAPRMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args,
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uint32_t nret, target_ulong rets)
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{
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sPAPRPHBState *sphb;
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sPAPRTCETable *tcet;
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uint32_t liobn;
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if ((nargs != 1) || (nret != 1)) {
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goto param_error_exit;
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}
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liobn = rtas_ld(args, 0);
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tcet = spapr_tce_find_by_liobn(liobn);
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if (!tcet) {
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goto param_error_exit;
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}
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sphb = SPAPR_PCI_HOST_BRIDGE(OBJECT(tcet)->parent);
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if (!sphb || !sphb->ddw_enabled || !tcet->nb_table) {
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goto param_error_exit;
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}
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spapr_tce_table_disable(tcet);
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trace_spapr_iommu_ddw_remove(liobn);
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rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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return;
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param_error_exit:
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rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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}
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static void rtas_ibm_reset_pe_dma_window(PowerPCCPU *cpu,
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sPAPRMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args,
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uint32_t nret, target_ulong rets)
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{
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sPAPRPHBState *sphb;
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uint64_t buid;
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uint32_t addr;
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if ((nargs != 3) || (nret != 1)) {
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goto param_error_exit;
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}
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buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
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addr = rtas_ld(args, 0);
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sphb = spapr_pci_find_phb(spapr, buid);
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if (!sphb || !sphb->ddw_enabled) {
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goto param_error_exit;
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}
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spapr_phb_dma_reset(sphb);
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trace_spapr_iommu_ddw_reset(buid, addr);
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rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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return;
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param_error_exit:
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rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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}
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static void spapr_rtas_ddw_init(void)
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{
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spapr_rtas_register(RTAS_IBM_QUERY_PE_DMA_WINDOW,
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"ibm,query-pe-dma-window",
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rtas_ibm_query_pe_dma_window);
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spapr_rtas_register(RTAS_IBM_CREATE_PE_DMA_WINDOW,
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"ibm,create-pe-dma-window",
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rtas_ibm_create_pe_dma_window);
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spapr_rtas_register(RTAS_IBM_REMOVE_PE_DMA_WINDOW,
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"ibm,remove-pe-dma-window",
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rtas_ibm_remove_pe_dma_window);
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spapr_rtas_register(RTAS_IBM_RESET_PE_DMA_WINDOW,
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"ibm,reset-pe-dma-window",
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rtas_ibm_reset_pe_dma_window);
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}
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type_init(spapr_rtas_ddw_init)
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