ad5d1add86
Today, the ICPState array of the sPAPR machine is indexed with 'cpu_index' of the CPUState. This numbering of CPUs is internal to QEMU and the guest only knows about what is exposed in the device tree, that is the 'cpu_dt_id'. This is why sPAPR uses the helper xics_get_cpu_index_by_dt_id() to do the mapping in a couple of places. To provide a more generic XICS layer, we need to abstract the IRQ 'server' number and remove any assumption made on its nature. It should not be used as a 'cpu_index' for lookups like xics_cpu_setup() and xics_cpu_destroy() do. To reach that goal, we choose to introduce a generic 'intc' backlink under PowerPCCPU, and let the machine core init routine do the ICPState lookup. The resulting object is passed on to xics_cpu_setup() which does the store under PowerPCCPU. The IRQ 'server' number in XICS is now generic. sPAPR uses 'cpu_dt_id' and PowerNV will use 'PIR' number. This also has the benefit of simplifying the sPAPR hcall routines which do not need to do any ICPState lookups anymore. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> |
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.. | ||
translate | ||
arch_dump.c | ||
compat.c | ||
cpu-models.c | ||
cpu-models.h | ||
cpu-qom.h | ||
cpu.c | ||
cpu.h | ||
dfp_helper.c | ||
excp_helper.c | ||
fpu_helper.c | ||
gdbstub.c | ||
helper_regs.h | ||
helper.h | ||
int_helper.c | ||
internal.h | ||
kvm_ppc.h | ||
kvm-stub.c | ||
kvm.c | ||
machine.c | ||
Makefile.objs | ||
mem_helper.c | ||
mfrom_table_gen.c | ||
mfrom_table.c | ||
misc_helper.c | ||
mmu_helper.c | ||
mmu-book3s-v3.c | ||
mmu-book3s-v3.h | ||
mmu-hash32.c | ||
mmu-hash32.h | ||
mmu-hash64.c | ||
mmu-hash64.h | ||
monitor.c | ||
STATUS | ||
timebase_helper.c | ||
trace-events | ||
translate_init.c | ||
translate.c | ||
user_only_helper.c |