65eab0f8cb
We need to rename the source file to a .S so we can do a single-line assemble and link invocation. We also specify the additional CFLAGS for the compile as it's a non-standard ARM binary. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> [rth: force fpu configuration] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
50 lines
779 B
ArmAsm
50 lines
779 B
ArmAsm
@ Checks whether iwMMXt is functional.
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.code 32
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.globl main
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main:
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ldr r0, =data0
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ldr r1, =data1
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ldr r2, =data2
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#ifndef FPA
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wldrd wr0, [r0, #0]
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wldrd wr1, [r0, #8]
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wldrd wr2, [r1, #0]
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wldrd wr3, [r1, #8]
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wsubb wr2, wr2, wr0
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wsubb wr3, wr3, wr1
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wldrd wr0, [r2, #0]
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wldrd wr1, [r2, #8]
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waddb wr0, wr0, wr2
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waddb wr1, wr1, wr3
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wstrd wr0, [r2, #0]
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wstrd wr1, [r2, #8]
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#else
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ldfe f0, [r0, #0]
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ldfe f1, [r0, #8]
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ldfe f2, [r1, #0]
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ldfe f3, [r1, #8]
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adfdp f2, f2, f0
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adfdp f3, f3, f1
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ldfe f0, [r2, #0]
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ldfe f1, [r2, #8]
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adfd f0, f0, f2
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adfd f1, f1, f3
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stfe f0, [r2, #0]
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stfe f1, [r2, #8]
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#endif
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mov r0, #1
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mov r1, r2
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mov r2, #0x11
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swi #0x900004
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mov r0, #0
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swi #0x900001
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.data
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data0:
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.string "aaaabbbbccccdddd"
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data1:
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.string "bbbbccccddddeeee"
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data2:
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.string "hvLLWs\x1fsdrs9\x1fNJ-\n"
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