b69773a8a7
The related copy is from Linux kernel "arch/tile/include/uapi/arch/ spr_def_64.h". Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <BLU436-SMTP1093D605AAE9B4837B564B8B9660@phx.gbl> Signed-off-by: Richard Henderson <rth@twiddle.net>
217 lines
7.8 KiB
C
217 lines
7.8 KiB
C
/*
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* Copyright 2011 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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#ifndef __DOXYGEN__
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#ifndef __ARCH_SPR_DEF_64_H__
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#define __ARCH_SPR_DEF_64_H__
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#define SPR_AUX_PERF_COUNT_0 0x2105
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#define SPR_AUX_PERF_COUNT_1 0x2106
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#define SPR_AUX_PERF_COUNT_CTL 0x2107
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#define SPR_AUX_PERF_COUNT_STS 0x2108
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#define SPR_CMPEXCH_VALUE 0x2780
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#define SPR_CYCLE 0x2781
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#define SPR_DONE 0x2705
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#define SPR_DSTREAM_PF 0x2706
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#define SPR_EVENT_BEGIN 0x2782
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#define SPR_EVENT_END 0x2783
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#define SPR_EX_CONTEXT_0_0 0x2580
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#define SPR_EX_CONTEXT_0_1 0x2581
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#define SPR_EX_CONTEXT_0_1__PL_SHIFT 0
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#define SPR_EX_CONTEXT_0_1__PL_RMASK 0x3
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#define SPR_EX_CONTEXT_0_1__PL_MASK 0x3
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#define SPR_EX_CONTEXT_0_1__ICS_SHIFT 2
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#define SPR_EX_CONTEXT_0_1__ICS_RMASK 0x1
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#define SPR_EX_CONTEXT_0_1__ICS_MASK 0x4
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#define SPR_EX_CONTEXT_1_0 0x2480
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#define SPR_EX_CONTEXT_1_1 0x2481
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#define SPR_EX_CONTEXT_1_1__PL_SHIFT 0
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#define SPR_EX_CONTEXT_1_1__PL_RMASK 0x3
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#define SPR_EX_CONTEXT_1_1__PL_MASK 0x3
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#define SPR_EX_CONTEXT_1_1__ICS_SHIFT 2
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#define SPR_EX_CONTEXT_1_1__ICS_RMASK 0x1
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#define SPR_EX_CONTEXT_1_1__ICS_MASK 0x4
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#define SPR_EX_CONTEXT_2_0 0x2380
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#define SPR_EX_CONTEXT_2_1 0x2381
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#define SPR_EX_CONTEXT_2_1__PL_SHIFT 0
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#define SPR_EX_CONTEXT_2_1__PL_RMASK 0x3
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#define SPR_EX_CONTEXT_2_1__PL_MASK 0x3
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#define SPR_EX_CONTEXT_2_1__ICS_SHIFT 2
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#define SPR_EX_CONTEXT_2_1__ICS_RMASK 0x1
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#define SPR_EX_CONTEXT_2_1__ICS_MASK 0x4
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#define SPR_FAIL 0x2707
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#define SPR_IDN_AVAIL_EN 0x1a05
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#define SPR_IDN_DATA_AVAIL 0x0a80
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#define SPR_IDN_DEADLOCK_TIMEOUT 0x1806
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#define SPR_IDN_DEMUX_COUNT_0 0x0a05
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#define SPR_IDN_DEMUX_COUNT_1 0x0a06
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#define SPR_IDN_DIRECTION_PROTECT 0x1405
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#define SPR_IDN_PENDING 0x0a08
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#define SPR_ILL_TRANS_REASON__I_STREAM_VA_RMASK 0x1
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#define SPR_INTCTRL_0_STATUS 0x2505
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#define SPR_INTCTRL_1_STATUS 0x2405
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#define SPR_INTCTRL_2_STATUS 0x2305
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#define SPR_INTERRUPT_CRITICAL_SECTION 0x2708
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#define SPR_INTERRUPT_MASK_0 0x2506
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#define SPR_INTERRUPT_MASK_1 0x2406
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#define SPR_INTERRUPT_MASK_2 0x2306
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#define SPR_INTERRUPT_MASK_RESET_0 0x2507
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#define SPR_INTERRUPT_MASK_RESET_1 0x2407
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#define SPR_INTERRUPT_MASK_RESET_2 0x2307
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#define SPR_INTERRUPT_MASK_SET_0 0x2508
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#define SPR_INTERRUPT_MASK_SET_1 0x2408
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#define SPR_INTERRUPT_MASK_SET_2 0x2308
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#define SPR_INTERRUPT_VECTOR_BASE_0 0x2509
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#define SPR_INTERRUPT_VECTOR_BASE_1 0x2409
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#define SPR_INTERRUPT_VECTOR_BASE_2 0x2309
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#define SPR_INTERRUPT_VECTOR_BASE_3 0x2209
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#define SPR_IPI_EVENT_0 0x1f05
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#define SPR_IPI_EVENT_1 0x1e05
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#define SPR_IPI_EVENT_2 0x1d05
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#define SPR_IPI_EVENT_RESET_0 0x1f06
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#define SPR_IPI_EVENT_RESET_1 0x1e06
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#define SPR_IPI_EVENT_RESET_2 0x1d06
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#define SPR_IPI_EVENT_SET_0 0x1f07
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#define SPR_IPI_EVENT_SET_1 0x1e07
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#define SPR_IPI_EVENT_SET_2 0x1d07
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#define SPR_IPI_MASK_0 0x1f08
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#define SPR_IPI_MASK_1 0x1e08
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#define SPR_IPI_MASK_2 0x1d08
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#define SPR_IPI_MASK_RESET_0 0x1f09
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#define SPR_IPI_MASK_RESET_1 0x1e09
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#define SPR_IPI_MASK_RESET_2 0x1d09
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#define SPR_IPI_MASK_SET_0 0x1f0a
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#define SPR_IPI_MASK_SET_1 0x1e0a
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#define SPR_IPI_MASK_SET_2 0x1d0a
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#define SPR_MPL_AUX_PERF_COUNT_SET_0 0x2100
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#define SPR_MPL_AUX_PERF_COUNT_SET_1 0x2101
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#define SPR_MPL_AUX_PERF_COUNT_SET_2 0x2102
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#define SPR_MPL_AUX_TILE_TIMER_SET_0 0x1700
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#define SPR_MPL_AUX_TILE_TIMER_SET_1 0x1701
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#define SPR_MPL_AUX_TILE_TIMER_SET_2 0x1702
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#define SPR_MPL_IDN_ACCESS_SET_0 0x0a00
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#define SPR_MPL_IDN_ACCESS_SET_1 0x0a01
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#define SPR_MPL_IDN_ACCESS_SET_2 0x0a02
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#define SPR_MPL_IDN_AVAIL_SET_0 0x1a00
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#define SPR_MPL_IDN_AVAIL_SET_1 0x1a01
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#define SPR_MPL_IDN_AVAIL_SET_2 0x1a02
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#define SPR_MPL_IDN_COMPLETE_SET_0 0x0500
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#define SPR_MPL_IDN_COMPLETE_SET_1 0x0501
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#define SPR_MPL_IDN_COMPLETE_SET_2 0x0502
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#define SPR_MPL_IDN_FIREWALL_SET_0 0x1400
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#define SPR_MPL_IDN_FIREWALL_SET_1 0x1401
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#define SPR_MPL_IDN_FIREWALL_SET_2 0x1402
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#define SPR_MPL_IDN_TIMER_SET_0 0x1800
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#define SPR_MPL_IDN_TIMER_SET_1 0x1801
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#define SPR_MPL_IDN_TIMER_SET_2 0x1802
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#define SPR_MPL_INTCTRL_0_SET_0 0x2500
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#define SPR_MPL_INTCTRL_0_SET_1 0x2501
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#define SPR_MPL_INTCTRL_0_SET_2 0x2502
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#define SPR_MPL_INTCTRL_1_SET_0 0x2400
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#define SPR_MPL_INTCTRL_1_SET_1 0x2401
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#define SPR_MPL_INTCTRL_1_SET_2 0x2402
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#define SPR_MPL_INTCTRL_2_SET_0 0x2300
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#define SPR_MPL_INTCTRL_2_SET_1 0x2301
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#define SPR_MPL_INTCTRL_2_SET_2 0x2302
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#define SPR_MPL_IPI_0 0x1f04
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#define SPR_MPL_IPI_0_SET_0 0x1f00
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#define SPR_MPL_IPI_0_SET_1 0x1f01
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#define SPR_MPL_IPI_0_SET_2 0x1f02
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#define SPR_MPL_IPI_1 0x1e04
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#define SPR_MPL_IPI_1_SET_0 0x1e00
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#define SPR_MPL_IPI_1_SET_1 0x1e01
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#define SPR_MPL_IPI_1_SET_2 0x1e02
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#define SPR_MPL_IPI_2 0x1d04
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#define SPR_MPL_IPI_2_SET_0 0x1d00
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#define SPR_MPL_IPI_2_SET_1 0x1d01
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#define SPR_MPL_IPI_2_SET_2 0x1d02
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#define SPR_MPL_PERF_COUNT_SET_0 0x2000
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#define SPR_MPL_PERF_COUNT_SET_1 0x2001
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#define SPR_MPL_PERF_COUNT_SET_2 0x2002
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#define SPR_MPL_UDN_ACCESS_SET_0 0x0b00
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#define SPR_MPL_UDN_ACCESS_SET_1 0x0b01
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#define SPR_MPL_UDN_ACCESS_SET_2 0x0b02
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#define SPR_MPL_UDN_AVAIL_SET_0 0x1b00
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#define SPR_MPL_UDN_AVAIL_SET_1 0x1b01
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#define SPR_MPL_UDN_AVAIL_SET_2 0x1b02
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#define SPR_MPL_UDN_COMPLETE_SET_0 0x0600
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#define SPR_MPL_UDN_COMPLETE_SET_1 0x0601
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#define SPR_MPL_UDN_COMPLETE_SET_2 0x0602
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#define SPR_MPL_UDN_FIREWALL_SET_0 0x1500
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#define SPR_MPL_UDN_FIREWALL_SET_1 0x1501
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#define SPR_MPL_UDN_FIREWALL_SET_2 0x1502
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#define SPR_MPL_UDN_TIMER_SET_0 0x1900
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#define SPR_MPL_UDN_TIMER_SET_1 0x1901
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#define SPR_MPL_UDN_TIMER_SET_2 0x1902
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#define SPR_MPL_WORLD_ACCESS_SET_0 0x2700
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#define SPR_MPL_WORLD_ACCESS_SET_1 0x2701
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#define SPR_MPL_WORLD_ACCESS_SET_2 0x2702
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#define SPR_PASS 0x2709
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#define SPR_PERF_COUNT_0 0x2005
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#define SPR_PERF_COUNT_1 0x2006
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#define SPR_PERF_COUNT_CTL 0x2007
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#define SPR_PERF_COUNT_DN_CTL 0x2008
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#define SPR_PERF_COUNT_STS 0x2009
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#define SPR_PROC_STATUS 0x2784
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#define SPR_SIM_CONTROL 0x2785
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#define SPR_SINGLE_STEP_CONTROL_0 0x0405
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#define SPR_SINGLE_STEP_CONTROL_0__CANCELED_MASK 0x1
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#define SPR_SINGLE_STEP_CONTROL_0__INHIBIT_MASK 0x2
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#define SPR_SINGLE_STEP_CONTROL_1 0x0305
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#define SPR_SINGLE_STEP_CONTROL_1__CANCELED_MASK 0x1
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#define SPR_SINGLE_STEP_CONTROL_1__INHIBIT_MASK 0x2
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#define SPR_SINGLE_STEP_CONTROL_2 0x0205
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#define SPR_SINGLE_STEP_CONTROL_2__CANCELED_MASK 0x1
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#define SPR_SINGLE_STEP_CONTROL_2__INHIBIT_MASK 0x2
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#define SPR_SINGLE_STEP_EN_0_0 0x250a
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#define SPR_SINGLE_STEP_EN_0_1 0x240a
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#define SPR_SINGLE_STEP_EN_0_2 0x230a
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#define SPR_SINGLE_STEP_EN_1_0 0x250b
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#define SPR_SINGLE_STEP_EN_1_1 0x240b
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#define SPR_SINGLE_STEP_EN_1_2 0x230b
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#define SPR_SINGLE_STEP_EN_2_0 0x250c
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#define SPR_SINGLE_STEP_EN_2_1 0x240c
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#define SPR_SINGLE_STEP_EN_2_2 0x230c
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#define SPR_SYSTEM_SAVE_0_0 0x2582
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#define SPR_SYSTEM_SAVE_0_1 0x2583
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#define SPR_SYSTEM_SAVE_0_2 0x2584
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#define SPR_SYSTEM_SAVE_0_3 0x2585
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#define SPR_SYSTEM_SAVE_1_0 0x2482
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#define SPR_SYSTEM_SAVE_1_1 0x2483
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#define SPR_SYSTEM_SAVE_1_2 0x2484
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#define SPR_SYSTEM_SAVE_1_3 0x2485
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#define SPR_SYSTEM_SAVE_2_0 0x2382
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#define SPR_SYSTEM_SAVE_2_1 0x2383
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#define SPR_SYSTEM_SAVE_2_2 0x2384
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#define SPR_SYSTEM_SAVE_2_3 0x2385
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#define SPR_TILE_COORD 0x270b
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#define SPR_TILE_RTF_HWM 0x270c
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#define SPR_TILE_TIMER_CONTROL 0x1605
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#define SPR_UDN_AVAIL_EN 0x1b05
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#define SPR_UDN_DATA_AVAIL 0x0b80
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#define SPR_UDN_DEADLOCK_TIMEOUT 0x1906
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#define SPR_UDN_DEMUX_COUNT_0 0x0b05
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#define SPR_UDN_DEMUX_COUNT_1 0x0b06
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#define SPR_UDN_DEMUX_COUNT_2 0x0b07
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#define SPR_UDN_DEMUX_COUNT_3 0x0b08
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#define SPR_UDN_DIRECTION_PROTECT 0x1505
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#define SPR_UDN_PENDING 0x0b0a
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#define SPR_WATCH_MASK 0x200a
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#define SPR_WATCH_VAL 0x200b
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#endif /* !defined(__ARCH_SPR_DEF_64_H__) */
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#endif /* !defined(__DOXYGEN__) */
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