Wilfred Mallawa aecabd50b7 hw: riscv: opentitan: fixup SPI addresses ... This patch updates the SPI_DEVICE, SPI_HOST0, SPI_HOST1 base addresses. Also adds these as unimplemented devices. The address references can be found [1]. [1] 6c317992fb/hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h (L107) Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-Id: <20220218063839.405082-1-alistair.francis@opensource.wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2022-03-03 13:14:50 +10:00
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boot.c
Kconfig
meson.build
microchip_pfsoc.c
numa.c
opentitan.c	hw: riscv: opentitan: fixup SPI addresses	2022-03-03 13:14:50 +10:00
riscv_hart.c
shakti_c.c
sifive_e.c
sifive_u.c
spike.c
virt.c