55641213fc
Since commit 224245b ("spapr: Add LMB DR connectors"), NUMA node
memory size must be aligned to 256MB (SPAPR_MEMORY_BLOCK_SIZE).
But when "-numa" option is provided without "mem" parameter,
the memory is equally divided between nodes, but 8MB aligned.
This can be not valid for pseries.
In that case we can have:
$ ./ppc64-softmmu/qemu-system-ppc64 -m 4G -numa node -numa node -numa node
qemu-system-ppc64: Node 0 memory size 0x55000000 is not aligned to 256 MiB
With this patch, we have:
(qemu) info numa
3 nodes
node 0 cpus: 0
node 0 size: 1280 MB
node 1 cpus:
node 1 size: 1280 MB
node 2 cpus:
node 2 size: 1536 MB
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
222 lines
7.1 KiB
C
222 lines
7.1 KiB
C
/* Declarations for use by board files for creating devices. */
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#ifndef HW_BOARDS_H
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#define HW_BOARDS_H
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#include "sysemu/blockdev.h"
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#include "sysemu/accel.h"
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#include "hw/qdev.h"
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#include "qom/object.h"
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#include "qom/cpu.h"
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void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner,
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const char *name,
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uint64_t ram_size);
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#define TYPE_MACHINE_SUFFIX "-machine"
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/* Machine class name that needs to be used for class-name-based machine
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* type lookup to work.
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*/
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#define MACHINE_TYPE_NAME(machinename) (machinename TYPE_MACHINE_SUFFIX)
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#define TYPE_MACHINE "machine"
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#undef MACHINE /* BSD defines it and QEMU does not use it */
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#define MACHINE(obj) \
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OBJECT_CHECK(MachineState, (obj), TYPE_MACHINE)
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#define MACHINE_GET_CLASS(obj) \
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OBJECT_GET_CLASS(MachineClass, (obj), TYPE_MACHINE)
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#define MACHINE_CLASS(klass) \
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OBJECT_CLASS_CHECK(MachineClass, (klass), TYPE_MACHINE)
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MachineClass *find_default_machine(void);
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extern MachineState *current_machine;
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bool machine_usb(MachineState *machine);
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bool machine_kernel_irqchip_allowed(MachineState *machine);
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bool machine_kernel_irqchip_required(MachineState *machine);
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bool machine_kernel_irqchip_split(MachineState *machine);
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int machine_kvm_shadow_mem(MachineState *machine);
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int machine_phandle_start(MachineState *machine);
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bool machine_dump_guest_core(MachineState *machine);
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bool machine_mem_merge(MachineState *machine);
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void machine_register_compat_props(MachineState *machine);
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HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine);
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/**
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* CPUArchId:
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* @arch_id - architecture-dependent CPU ID of present or possible CPU
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* @cpu - pointer to corresponding CPU object if it's present on NULL otherwise
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* @props - CPU object properties, initialized by board
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* #vcpus_count - number of threads provided by @cpu object
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*/
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typedef struct {
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uint64_t arch_id;
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int64_t vcpus_count;
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CpuInstanceProperties props;
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Object *cpu;
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} CPUArchId;
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/**
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* CPUArchIdList:
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* @len - number of @CPUArchId items in @cpus array
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* @cpus - array of present or possible CPUs for current machine configuration
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*/
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typedef struct {
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int len;
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CPUArchId cpus[0];
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} CPUArchIdList;
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/**
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* MachineClass:
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* @get_hotplug_handler: this function is called during bus-less
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* device hotplug. If defined it returns pointer to an instance
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* of HotplugHandler object, which handles hotplug operation
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* for a given @dev. It may return NULL if @dev doesn't require
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* any actions to be performed by hotplug handler.
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* @cpu_index_to_socket_id:
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* used to provide @cpu_index to socket number mapping, allowing
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* a machine to group CPU threads belonging to the same socket/package
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* Returns: socket number given cpu_index belongs to.
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* @hw_version:
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* Value of QEMU_VERSION when the machine was added to QEMU.
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* Set only by old machines because they need to keep
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* compatibility on code that exposed QEMU_VERSION to guests in
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* the past (and now use qemu_hw_version()).
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* @possible_cpu_arch_ids:
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* Returns an array of @CPUArchId architecture-dependent CPU IDs
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* which includes CPU IDs for present and possible to hotplug CPUs.
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* Caller is responsible for freeing returned list.
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* @has_hotpluggable_cpus:
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* If true, board supports CPUs creation with -device/device_add.
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* @minimum_page_bits:
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* If non-zero, the board promises never to create a CPU with a page size
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* smaller than this, so QEMU can use a more efficient larger page
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* size than the target architecture's minimum. (Attempting to create
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* such a CPU will fail.) Note that changing this is a migration
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* compatibility break for the machine.
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*/
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struct MachineClass {
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/*< private >*/
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ObjectClass parent_class;
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/*< public >*/
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const char *family; /* NULL iff @name identifies a standalone machtype */
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char *name;
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const char *alias;
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const char *desc;
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void (*init)(MachineState *state);
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void (*reset)(void);
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void (*hot_add_cpu)(const int64_t id, Error **errp);
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int (*kvm_type)(const char *arg);
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BlockInterfaceType block_default_type;
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int units_per_default_bus;
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int max_cpus;
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unsigned int no_serial:1,
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no_parallel:1,
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use_virtcon:1,
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use_sclp:1,
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no_floppy:1,
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no_cdrom:1,
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no_sdcard:1,
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has_dynamic_sysbus:1,
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pci_allow_0_address:1,
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legacy_fw_cfg_order:1;
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int is_default;
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const char *default_machine_opts;
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const char *default_boot_order;
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const char *default_display;
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GArray *compat_props;
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const char *hw_version;
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ram_addr_t default_ram_size;
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bool option_rom_has_mr;
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bool rom_file_has_mr;
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int minimum_page_bits;
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bool has_hotpluggable_cpus;
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int numa_mem_align_shift;
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HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
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DeviceState *dev);
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unsigned (*cpu_index_to_socket_id)(unsigned cpu_index);
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const CPUArchIdList *(*possible_cpu_arch_ids)(MachineState *machine);
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};
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/**
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* MachineState:
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*/
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struct MachineState {
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/*< private >*/
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Object parent_obj;
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Notifier sysbus_notifier;
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/*< public >*/
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char *accel;
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bool kernel_irqchip_allowed;
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bool kernel_irqchip_required;
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bool kernel_irqchip_split;
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int kvm_shadow_mem;
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char *dtb;
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char *dumpdtb;
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int phandle_start;
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char *dt_compatible;
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bool dump_guest_core;
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bool mem_merge;
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bool usb;
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bool usb_disabled;
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bool igd_gfx_passthru;
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char *firmware;
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bool iommu;
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bool suppress_vmdesc;
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bool enforce_config_section;
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bool enable_graphics;
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ram_addr_t ram_size;
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ram_addr_t maxram_size;
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uint64_t ram_slots;
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const char *boot_order;
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char *kernel_filename;
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char *kernel_cmdline;
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char *initrd_filename;
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const char *cpu_model;
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AccelState *accelerator;
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CPUArchIdList *possible_cpus;
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};
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#define DEFINE_MACHINE(namestr, machine_initfn) \
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static void machine_initfn##_class_init(ObjectClass *oc, void *data) \
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{ \
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MachineClass *mc = MACHINE_CLASS(oc); \
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machine_initfn(mc); \
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} \
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static const TypeInfo machine_initfn##_typeinfo = { \
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.name = MACHINE_TYPE_NAME(namestr), \
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.parent = TYPE_MACHINE, \
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.class_init = machine_initfn##_class_init, \
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}; \
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static void machine_initfn##_register_types(void) \
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{ \
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type_register_static(&machine_initfn##_typeinfo); \
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} \
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type_init(machine_initfn##_register_types)
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#define SET_MACHINE_COMPAT(m, COMPAT) \
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do { \
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int i; \
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static GlobalProperty props[] = { \
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COMPAT \
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{ /* end of list */ } \
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}; \
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if (!m->compat_props) { \
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m->compat_props = g_array_new(false, false, sizeof(void *)); \
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} \
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for (i = 0; props[i].driver != NULL; i++) { \
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GlobalProperty *prop = &props[i]; \
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g_array_append_val(m->compat_props, prop); \
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} \
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} while (0)
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#endif
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