qemu/target at aa0d7ed658f6afbdbcf4ceb8613b3c2cf5fbc7c4 - qemu

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Mateja Marjanovic 0df911fd7f target/mips: Improve performance of certain MSA instructions

Eliminate loops for better performance.

Following MSA instructions from "UNOP" group are affected:

 - NLZC.<B|H|W|D>
 - NLOC.<B|H|W|D>
 - PCNT.<B|H|W|D>

Following MSA instructions from "BINOP" group are affected:

 - ADD_A.<B|H|W|D>
 - ADDS_A.<B|H|W|D>
 - ADDS_S.<B|H|W|D>
 - ADDS_U.<B|H|W|D>
 - ADDV.<B|H|W|D>
 - ASUB_S.<B|H|W|D>
 - ASUB_U.<B|H|W|D>
 - AVE_S.<B|H|W|D>
 - AVE_U.<B|H|W|D>
 - AVER_S.<B|H|W|D>
 - AVER_U.<B|H|W|D>
 - BCLR.<B|H|W|D>
 - BNEG.<B|H|W|D>
 - BSET.<B|H|W|D>
 - CEQ.<B|H|W|D>
 - CLE_S.<B|H|W|D>
 - CLE_U.<B|H|W|D>
 - CLT_S.<B|H|W|D>
 - CLT_U.<B|H|W|D>
 - DIV_S.<B|H|W|D>
 - DIV_U.<B|H|W|D>
 - DOTP_S.<B|H|W|D>
 - DOTP_U.<B|H|W|D>
 - HADD_S.<B|H|W|D>
 - HADD_U.<B|H|W|D>
 - HSUB_S.<B|H|W|D>
 - HSUB_U.<B|H|W|D>
 - MAX_A.<B|H|W|D>
 - MAX_S.<B|H|W|D>
 - MAX_U.<B|H|W|D>
 - MIN_A.<B|H|W|D>
 - MIN_S.<B|H|W|D>
 - MIN_U.<B|H|W|D>
 - MOD_S.<B|H|W|D>
 - MOD_U.<B|H|W|D>
 - MUL_Q.<B|H|W|D>
 - MULR_Q.<B|H|W|D>
 - MULV.<B|H|W|D>
 - SLL.<B|H|W|D>
 - SRA.<B|H|W|D>
 - SRAR.<B|H|W|D>
 - SRL.<B|H|W|D>
 - SRLR.<B|H|W|D>
 - SUBS_S.<B|H|W|D>
 - SUBS_U.<B|H|W|D>
 - SUBSUS_U.<B|H|W|D>
 - SUBSUU_S.<B|H|W|D>
 - SUBV.<B|H|W|D>

Following MSA instructions from "TEROP" group are affected:

 - BINSL.<B|H|W|D>
 - BINSR.<B|H|W|D>
 - DPADD_S.<B|H|W|D>
 - DPADD_U.<B|H|W|D>
 - DPSUB_S.<B|H|W|D>
 - DPSUB_U.<B|H|W|D>
 - MADD_Q.<B|H|W|D>
 - MADDR_Q.<B|H|W|D>
 - MADDV.<B|H|W|D>
 - MSUB_Q.<B|H|W|D>
 - MSUBR_Q.<B|H|W|D>
 - MSUBV.<B|H|W|D>

Additionally, following MSA instructionas are also affected:

 - ILVL.<B|H|W|D>
 - ILVR.<B|H|W|D>
 - ILVEV.<B|H|W|D>
 - ILVOD.<B|H|W|D>
 - PCKEV.<B|H|W|D>
 - PCKOD.<B|H|W|D>

Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1551718283-4487-2-git-send-email-mateja.marjanovic@rt-rk.com>

2019-06-01 20:20:20 +02:00

alpha

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arm

target/arm: correct return values for WRITE/READ in arm-semi

2019-05-28 10:28:51 +01:00

cris

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hppa

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i386

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