qemu/target/ppc/translate
Bharata B Rao a8d411abac target-ppc: Implement round to odd variants of quad FP instructions
xsaddqpo:  VSX Scalar Add Quad-Precision using round to Odd
xsmulqo:   VSX Scalar Multiply Quad-Precision using round to Odd
xsdivqpo:  VSX Scalar Divide Quad-Precision using round to Odd
xscvqpdpo: VSX Scalar round & Convert Quad-Precision format to
           Double-Precision format using round to Odd
xssqrtqpo: VSX Scalar Square Root Quad-Precision using round to Odd
xssubqpo:  VSX Scalar Subtract Quad-Precision using round to Odd

In addition, fix the invalid bitmask in the instruction encoding
of xssqrtqp[o].

Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
CC: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-02-22 11:28:28 +11:00
..
dfp-impl.inc.c
dfp-ops.inc.c
fp-impl.inc.c target-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64 2017-01-31 10:10:14 +11:00
fp-ops.inc.c target-ppc: implement stxsd and stxssp 2017-01-31 10:10:12 +11:00
spe-impl.inc.c
spe-ops.inc.c
vmx-impl.inc.c ppc: Implement bcdutrunc. instruction 2017-01-31 10:10:14 +11:00
vmx-ops.inc.c ppc: Implement bcdutrunc. instruction 2017-01-31 10:10:14 +11:00
vsx-impl.inc.c target-ppc: Add xsmaxjdp and xsminjdp instructions 2017-02-22 11:28:27 +11:00
vsx-ops.inc.c target-ppc: Implement round to odd variants of quad FP instructions 2017-02-22 11:28:28 +11:00