Markus Armbruster a8d2532645 Include qemu-common.h exactly where needed ... No header includes qemu-common.h after this commit, as prescribed by qemu-common.h's file comment. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-5-armbru@redhat.com> [Rebased with conflicts resolved automatically, except for include/hw/arm/xlnx-zynqmp.h hw/arm/nrf51_soc.c hw/arm/msf2-soc.c block/qcow2-refcount.c block/qcow2-cluster.c block/qcow2-cache.c target/arm/cpu.h target/lm32/cpu.h target/m68k/cpu.h target/mips/cpu.h target/moxie/cpu.h target/nios2/cpu.h target/openrisc/cpu.h target/riscv/cpu.h target/tilegx/cpu.h target/tricore/cpu.h target/unicore32/cpu.h target/xtensa/cpu.h; bsd-user/main.c and net/tap-bsd.c fixed up]		2019-06-12 13:20:20 +02:00
..
insn_trans	target/riscv: Split gen_arith_imm into functional and temp	2019-05-24 12:09:23 -07:00
cpu_bits.h	target/riscv: Add the HGATP register masks	2019-05-24 12:09:25 -07:00
cpu_helper.c	target/riscv: Use env_cpu, env_archcpu	2019-06-10 07:03:42 -07:00
cpu_user.h	RISC-V: linux-user support for RVE ABI	2019-03-19 05:14:39 -07:00
cpu-param.h	tcg: Split out target/arch/cpu-param.h	2019-06-10 07:03:34 -07:00
cpu.c	qemu-common: Move qemu_isalnum() etc. to qemu/ctype.h	2019-06-11 20:22:09 +02:00
cpu.h	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00
csr.c	target/riscv: Use env_cpu, env_archcpu	2019-06-10 07:03:42 -07:00
fpu_helper.c	RISC-V: Use riscv prefix consistently on cpu helpers	2019-02-11 15:56:21 -08:00
gdbstub.c	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00
helper.h	RISC-V CPU Helpers	2018-03-07 08:30:28 +13:00
insn16-32.decode	target/riscv: Split RVC32 and RVC64 insns into separate files	2019-05-24 12:09:22 -07:00
insn16-64.decode	target/riscv: Add checks for several RVC reserved operands	2019-05-24 12:09:25 -07:00
insn16.decode	target/riscv: Add checks for several RVC reserved operands	2019-05-24 12:09:25 -07:00
insn32-64.decode	target/riscv: Convert RV64D insns to decodetree	2019-03-13 10:34:06 +01:00
insn32.decode	target/riscv: Name the argument sets for all of insn32 formats	2019-05-24 12:09:22 -07:00
instmap.h	RISC-V TCG Code Generation	2018-03-07 08:30:28 +13:00
Makefile.objs	target/riscv: Split RVC32 and RVC64 insns into separate files	2019-05-24 12:09:22 -07:00
op_helper.c	target/riscv: Use env_cpu, env_archcpu	2019-06-10 07:03:42 -07:00
pmp.c	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00
pmp.h	Clean up ill-advised or unusual header guards	2019-05-13 08:58:55 +02:00
trace-events	RISC-V: Convert trap debugging to trace events	2019-03-19 05:14:40 -07:00
translate.c	target/riscv: Split gen_arith_imm into functional and temp	2019-05-24 12:09:23 -07:00