qemu/target
Daniel Henrique Barboza a88154835a riscv-qmp-cmds.c: expose named features in cpu_model_expansion
Named features (zic64b the sole example at this moment) aren't expose to
users, thus we need another way to expose them.

Go through each named feature, get its boolean value, do the needed
conversions (bool to qbool, qbool to QObject) and add it to output dict.

Another adjustment is needed: named features are evaluated during
finalize(), so riscv_cpu_finalize_features() needs to be mandatory
regardless of whether we have an input dict or not. Otherwise zic64b
will always return 'false', which is incorrect: the default values of
cache blocksizes ([cbom/cbop/cboz]_blocksize) are set to 64, satisfying
the conditions for zic64b.

Here's an API usage example after this patch:

 $ ./build/qemu-system-riscv64 -S -M virt -display none
    -qmp tcp:localhost:1234,server,wait=off

 $ ./scripts/qmp/qmp-shell localhost:1234
Welcome to the QMP low-level shell!
Connected to QEMU 8.1.50

(QEMU) query-cpu-model-expansion type=full model={"name":"rv64"}
{"return": {"model":
    {"name": "rv64", "props": {... "zic64b": true, ...}}}}

zic64b is set to 'true', as expected, since all cache sizes are 64
bytes by default.

If we change one of the cache blocksizes, zic64b is returned as 'false':

(QEMU) query-cpu-model-expansion type=full model={"name":"rv64","props":{"cbom_blocksize":128}}
{"return": {"model":
    {"name": "rv64", "props": {... "zic64b": false, ...}}}}

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20231218125334.37184-8-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-01-10 18:47:47 +10:00
..
alpha target/alpha: Use generic cpu_list() 2024-01-05 16:20:14 +01:00
arm Replace "iothread lock" with "BQL" in comments 2024-01-08 10:45:43 -05:00
avr target/avr: Use generic cpu_list() 2024-01-05 16:20:14 +01:00
cris target/cris: Use generic cpu_list() 2024-01-05 16:20:14 +01:00
hexagon target/hexagon: Use generic cpu_list() 2024-01-05 16:20:14 +01:00
hppa system/cpus: rename qemu_mutex_lock_iothread() to bql_lock() 2024-01-08 10:45:43 -05:00
i386 qemu/main-loop: rename qemu_cond_wait_iothread() to qemu_cond_wait_bql() 2024-01-08 10:45:43 -05:00
loongarch system/cpus: rename qemu_mutex_lock_iothread() to bql_lock() 2024-01-08 10:45:43 -05:00
m68k target/m68k: Use generic cpu_list() 2024-01-05 16:20:14 +01:00
microblaze target/microblaze: Constify VMState in machine.c 2023-12-29 11:17:30 +11:00
mips system/cpus: rename qemu_mutex_lock_iothread() to bql_lock() 2024-01-08 10:45:43 -05:00
nios2 target: Move ArchCPUClass definition to 'cpu.h' 2023-11-07 13:08:48 +01:00
openrisc system/cpus: rename qemu_mutex_lock_iothread() to bql_lock() 2024-01-08 10:45:43 -05:00
ppc qemu/main-loop: rename QEMU_IOTHREAD_LOCK_GUARD to BQL_LOCK_GUARD 2024-01-08 10:45:43 -05:00
riscv riscv-qmp-cmds.c: expose named features in cpu_model_expansion 2024-01-10 18:47:47 +10:00
rx target/rx: Use generic cpu_list() 2024-01-05 16:20:14 +01:00
s390x system/cpus: rename qemu_mutex_lock_iothread() to bql_lock() 2024-01-08 10:45:43 -05:00
sh4 target/sh4: Use generic cpu_list() 2024-01-05 16:20:14 +01:00
sparc system/cpus: rename qemu_mutex_lock_iothread() to bql_lock() 2024-01-08 10:45:43 -05:00
tricore target/tricore: Use generic cpu_list() 2024-01-05 16:20:14 +01:00
xtensa system/cpus: rename qemu_mutex_lock_iothread() to bql_lock() 2024-01-08 10:45:43 -05:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
meson.build target/loongarch: Add target build suport 2022-06-06 18:09:03 +00:00