qemu/target
Chinmay Rath a7e10fab78 target/ppc: Move VMX integer add/sub saturate insns to decodetree.
Moving the following instructions to decodetree specification :

	v{add,sub}{u,s}{b,h,w}s		: VX-form

The changes were verified by validating that the tcg ops generated by those
instructions remain the same, which were captured with the '-d in_asm,op' flag.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Chinmay Rath <rathc@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-07-26 09:51:33 +10:00
..
alpha target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
arm bsd-user: Make compile for non-linux user-mode stuff 2024-07-23 10:56:30 -06:00
avr target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
cris target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
hexagon target/hexagon/imported/mmvec: Fix superfluous trailing semicolon 2024-07-17 14:04:15 +03:00
hppa target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
i386 Add support for RAPL MSRs in KVM/Qemu 2024-07-22 19:19:37 +02:00
loongarch target/loongarch: Fix helper_lddir() a CID INTEGER_OVERFLOW issue 2024-07-24 16:52:18 +08:00
m68k target/m68k: Restrict semihosting to TCG 2024-07-22 09:38:08 +01:00
microblaze target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
mips target/mips: Restrict semihosting to TCG 2024-07-22 09:38:10 +01:00
openrisc target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
ppc target/ppc: Move VMX integer add/sub saturate insns to decodetree. 2024-07-26 09:51:33 +10:00
riscv accel/tcg: Export set/clear_helper_retaddr 2024-07-23 15:19:39 +10:00
rx target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
s390x accel/tcg: Export set/clear_helper_retaddr 2024-07-23 15:19:39 +10:00
sh4 target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation 2024-07-11 11:41:34 +01:00
sparc sparc/ldst_helper: make range overlap check more readable 2024-07-23 20:30:36 +02:00
tricore accel/tcg: Make cpu_exec_interrupt hook mandatory 2024-07-16 20:04:08 +02:00
xtensa target/xtensa: Restrict semihosting to TCG 2024-07-22 09:38:14 +01:00
Kconfig meson: make target endianneess available to Kconfig 2024-05-03 15:47:47 +02:00
meson.build exec: Expose 'target_page.h' API to user emulation 2024-04-26 15:28:11 +02:00