qemu/include
Cédric Le Goater a779e37c68 aspeed/smc: Introduce a new addr_width() class handler
The AST2400 SPI controller has a transitional HW interface and it
stores the address width currently in use in a different register than
all the other SMC controllers. It needs special handling when working
in 4B mode.

Make it clear through a class handler. This also removes another use
of the segments array.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-10-12 08:20:08 +02:00
..
authz
block block: introduce max_hw_iov for use in scsi-generic 2021-10-06 10:25:55 +02:00
chardev chardev: add some comments about the class methods 2021-09-14 16:57:11 +04:00
crypto
disas
exec tcg: Split out MemOpIdx to exec/memopidx.h 2021-10-05 16:53:17 -07:00
fpu
hw aspeed/smc: Introduce a new addr_width() class handler 2021-10-12 08:20:08 +02:00
io
libdecnumber
migration
monitor target/i386: Add HMP and QMP interfaces for SGX 2021-09-30 15:30:24 +02:00
net vhost_net: do not assume nvqs is always 2 2021-09-04 17:34:05 -04:00
qapi
qemu mirror: Handle errors after READY cancel 2021-10-07 10:26:35 -07:00
qom
scsi
semihosting
standard-headers
sysemu block: introduce max_hw_iov for use in scsi-generic 2021-10-06 10:25:55 +02:00
tcg tcg: Split out MemOpIdx to exec/memopidx.h 2021-10-05 16:53:17 -07:00
ui ui/gtk-egl: Wait for the draw signal for dmabuf blobs 2021-09-15 08:41:59 +02:00
user
elf.h
glib-compat.h
qemu-common.h
qemu-io.h
trace-tcg.h