Peter Maydell 036793aebf Machine and x86 queue, 2018-03-19 ... * cpu_model/cpu_type cleanups * x86: Fix on Intel Processor Trace CPUID checks -----BEGIN PGP SIGNATURE----- iQIcBAABCAAGBQJasBhyAAoJECgHk2+YTcWmex4QAJ08ac8kDK0oHT4wyZFJkf4s tvrfY8LeAEwlSZaOSierJyJZpuRJldQWQdZRk9tdUYiDXzIkn7T5ate4ju9JmIsa C+VRb4ELeoOt8sILSe7hMjtCYGDfQqJ03ApMHAx+ns+MLcytlf7Hb0IilcueKkZx GGl3lLScdCyLSGqnX4ls+hQQrpL+rhjnLnpptIcMOAqqUMqzmt2TDU03Y8QaSy9m HeCECfgaqxBg7w1CaBsurN2X6kh/usx91Uae+4iZ5pj2x0Dublu4IYcYCCjpFzj+ r76LfcZdt4aGWQCuFVulcnvbogmlxxCRjahitrsR79QlFlhtxRHhf97/r8plo7q3 lTHumGy5ZP7866FgZXCsseR1pNluEE/VFX0ooTrvQYWBA/C7tuBxn/4+5Fqpy78y aA0nymphaNTMkEMkM1fEzN4mVT+l5x1GyXAjDYLLgE9pOt1rMmWrXohZe18LUfOc IIDUxUMkP+vRxSEXzZvjcqt3KhGTjedOsMeWKb9Qdu6vVa7C55r0bzpya1tzw7AS rLBulqIy2J0Lrzg/0wP5acPykXh5DzGmJuNEip0NuNFQ79+bWaEAE0ZHQnhgd6zo gZuglQnTl8d5yvwE3HDU5r/zNbjqlcBVQ/th8ZUTKGKBzdECQ5eQROgdDFRZuDNB N4kfkPY/4O/0r+8xuAxB =13B9 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging Machine and x86 queue, 2018-03-19 * cpu_model/cpu_type cleanups * x86: Fix on Intel Processor Trace CPUID checks # gpg: Signature made Mon 19 Mar 2018 20:07:14 GMT # gpg: using RSA key 2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: i386: Disable Intel PT if packets IP payloads have LIP values cpu: drop unnecessary NULL check and cpu_common_class_by_name() cpu: get rid of unused cpu_init() defines Use cpu_create(type) instead of cpu_init(cpu_model) cpu: add CPU_RESOLVING_TYPE macro tests: add machine 'none' with -cpu test nios2: 10m50_devboard: replace cpu_model with cpu_type Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2018-03-20 12:56:20 +00:00
..
cpu_bits.h	RISC-V CPU Core Definition	2018-03-07 08:30:28 +13:00
cpu_user.h	RISC-V Linux User Emulation	2018-03-07 08:30:28 +13:00
cpu.c	RISC-V: Fix riscv_isa_string memory size bug	2018-03-20 11:45:55 +00:00
cpu.h	cpu: add CPU_RESOLVING_TYPE macro	2018-03-19 14:10:36 -03:00
fpu_helper.c	RISC-V FPU Support	2018-03-07 08:30:28 +13:00
gdbstub.c	RISC-V GDB Stub	2018-03-07 08:30:28 +13:00
helper.c	RISC-V CPU Helpers	2018-03-07 08:30:28 +13:00
helper.h	RISC-V CPU Helpers	2018-03-07 08:30:28 +13:00
instmap.h	RISC-V TCG Code Generation	2018-03-07 08:30:28 +13:00
Makefile.objs	RISC-V Build Infrastructure	2018-03-07 08:30:28 +13:00
op_helper.c	RISC-V CPU Helpers	2018-03-07 08:30:28 +13:00
pmp.c	RISC-V Physical Memory Protection	2018-03-07 08:30:28 +13:00
pmp.h	RISC-V Physical Memory Protection	2018-03-07 08:30:28 +13:00
translate.c	RISC-V TCG Code Generation	2018-03-07 08:30:28 +13:00