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a6e0f67e77
qemu/target/arm/tcg
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Peter Maydell 35aa6715dd target/arm: Catch illegal-exception-return from EL3 with bad NSE/NS 
The architecture requires (R_TYTWB) that an attempt to return from EL3
when SCR_EL3.{NSE,NS} are {1,0} is an illegal exception return. (This
enforces that the CPU can't ever be executing below EL3 with the
NSE,NS bits indicating an invalid security state.)

We were missing this check; add it.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230807150618.101357-1-peter.maydell@linaro.org
2023-08-31 09:45:17 +01:00
..
a32-uncond.decode
a32.decode
a64.decode target/arm: Convert load/store tags insns to decodetree 2023-06-19 11:23:38 +01:00
arm_ldst.h target/arm: Move translate-a32.h, arm_ldst.h, sve_ldst_internal.h to tcg/ 2023-05-12 15:43:36 +01:00
cpu32.c target/arm: Implement FEAT_HPDS2 as a no-op 2023-08-31 09:45:16 +01:00
cpu64.c target/arm: properly document FEAT_CRC32 2023-08-31 09:45:16 +01:00
crypto_helper.c target/arm: Use aesdec_IMC 2023-07-09 13:47:05 +01:00
helper-a64.c target/arm: Catch illegal-exception-return from EL3 with bad NSE/NS 2023-08-31 09:45:17 +01:00
helper-a64.h target/arm: Relax ordered/atomic alignment checks for LSE2 2023-06-06 10:19:38 +01:00
helper-mve.h target/arm: Move helper-{a64,mve,sme,sve}.h to tcg/ 2023-05-12 15:43:37 +01:00
helper-sme.h target/arm: Move helper-{a64,mve,sme,sve}.h to tcg/ 2023-05-12 15:43:37 +01:00
helper-sve.h target/arm: Move helper-{a64,mve,sme,sve}.h to tcg/ 2023-05-12 15:43:37 +01:00
hflags.c target/arm: Add SCTLR.nAA to TBFLAG_A64 2023-06-06 10:19:38 +01:00
iwmmxt_helper.c
m_helper.c arm: spelling fixes 2023-07-25 17:13:53 +03:00
m-nocp.decode
meson.build target/arm/tcg: Don't build AArch64 decodetree files for qemu-system-arm 2023-07-31 11:41:21 +01:00
mte_helper.c target/arm: Support more GM blocksizes 2023-08-31 09:45:14 +01:00
mve_helper.c
mve.decode
neon_helper.c
neon-dp.decode
neon-ls.decode
neon-shared.decode
op_helper.c
pauth_helper.c target/arm: Correct AArch64.S2MinTxSZ 32-bit EL1 input size check 2023-05-12 16:01:25 +01:00
psci.c target/arm: Move psci.c into the tcg directory 2023-02-27 13:27:04 +00:00
sme_helper.c target/arm: Fix SME ST1Q 2023-08-22 17:31:13 +01:00
sme-fa64.decode
sme.decode
sve_helper.c plugins: force slow path when plugins instrument memory ops 2023-07-03 12:51:58 +01:00
sve_ldst_internal.h target/arm: Move translate-a32.h, arm_ldst.h, sve_ldst_internal.h to tcg/ 2023-05-12 15:43:36 +01:00
sve.decode target/arm: Demultiplex AESE and AESMC 2023-07-08 07:30:18 +01:00
t16.decode
t32.decode
tlb_helper.c target/arm: Implement GPC exceptions 2023-06-23 11:15:48 +01:00
translate-a32.h target/arm: Move translate-a32.h, arm_ldst.h, sve_ldst_internal.h to tcg/ 2023-05-12 15:43:36 +01:00
translate-a64.c target/arm: Allow cpu to configure GM blocksize 2023-08-31 09:45:14 +01:00
translate-a64.h target/arm: Pass single_memop to gen_mte_checkN 2023-06-06 10:19:37 +01:00
translate-m-nocp.c target/arm: Tidy helpers for translation 2023-06-05 12:04:29 -07:00
translate-mve.c arm: spelling fixes 2023-07-25 17:13:53 +03:00
translate-neon.c target/arm: Demultiplex AESE and AESMC 2023-07-08 07:30:18 +01:00
translate-sme.c target/arm: Fix SME full tile indexing 2023-07-06 12:56:21 +01:00
translate-sve.c arm: spelling fixes 2023-07-25 17:13:53 +03:00
translate-vfp.c arm: spelling fixes 2023-07-25 17:13:53 +03:00
translate.c target/arm: Use tcg_gen_negsetcond_* 2023-08-24 11:22:42 -07:00
translate.h target/arm: Allow cpu to configure GM blocksize 2023-08-31 09:45:14 +01:00
vec_helper.c arm: spelling fixes 2023-07-25 17:13:53 +03:00
vec_internal.h
vfp-uncond.decode
vfp.decode