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qemu/target/i386/tcg
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Paolo Bonzini efcca7ef17 target/i386: introduce insn_get_addr 
The "O" operand type in the Intel SDM needs to load an 8- to 64-bit
unsigned value, while insn_get is limited to 32 bits.  Extract the code
out of disas_insn and into a separate function.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-09-19 15:16:00 +02:00
..
sysemu
target/i386: Raise #GP on unaligned m128 accesses when required.
2022-09-18 09:17:40 +02:00
user
target/i386: Raise #GP on unaligned m128 accesses when required.
2022-09-18 09:17:40 +02:00
bpt_helper.c
compiler.h: replace QEMU_NORETURN with G_NORETURN
2022-04-21 17:03:51 +04:00
cc_helper_template.h
…
cc_helper.c
…
excp_helper.c
target/i386: Raise #GP on unaligned m128 accesses when required.
2022-09-18 09:17:40 +02:00
fpu_helper.c
target/i386: Suppress coverity warning on fsave/frstor
2022-04-26 19:59:51 -07:00
helper-tcg.h
target/i386: Raise #GP on unaligned m128 accesses when required.
2022-09-18 09:17:40 +02:00
int_helper.c
exec/exec-all: Move 'qemu/log.h' include in units requiring it
2022-02-21 10:18:06 +01:00
mem_helper.c
exec/memop: Adding signedness to quad definitions
2022-01-08 15:46:10 +10:00
meson.build
i386: split svm_helper into sysemu and stub-only user
2021-05-10 15:41:51 -04:00
misc_helper.c
compiler.h: replace QEMU_NORETURN with G_NORETURN
2022-04-21 17:03:51 +04:00
mpx_helper.c
…
seg_helper.c
target/i386: Throw a #SS when loading a non-canonical IST
2022-03-15 11:50:15 +01:00
seg_helper.h
i386: split seg_helper into user-only and sysemu parts
2021-05-10 15:41:52 -04:00
tcg-cpu.c
target/i386: Raise #GP on unaligned m128 accesses when required.
2022-09-18 09:17:40 +02:00
tcg-cpu.h
target/i386: Move X86XSaveArea into TCG
2021-07-06 08:33:51 +02:00
tcg-stub.c
…
translate.c
target/i386: introduce insn_get_addr
2022-09-19 15:16:00 +02:00