Peter Maydell fe8fcf3d64 target-arm: Don't permit ARMv8-only Neon insns on ARMv7 ... The Neon instructions VCVTA, VCVTM, VCVTN, VCVTP, VRINTA, VRINTM, VRINTN, VRINTP, VRINTX, and VRINTZ were only introduced with ARMv8, so they need a guard to make them UNDEF if the CPU only supports ARMv7. (We got this right for all the other new-in-v8 insns, but forgot it for these Neon 2-reg-misc ops.) Reported-by: Christophe Lyon <christophe.lyon@linaro.org> Tested-by: Christophe Lyon <christophe.lyon@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1465492511-9333-1-git-send-email-peter.maydell@linaro.org		2016-06-14 16:01:03 +01:00
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arch_dump.c
arm_ldst.h
arm-powerctl.c
arm-powerctl.h
arm-semi.c
cpu64.c
cpu-qom.h
cpu.c
cpu.h
crypto_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c
helper-a64.h
helper.c	target-arm: Fix reset and migration of TTBCR(S)	2016-06-14 15:59:12 +01:00
helper.h
internals.h
iwmmxt_helper.c
kvm32.c
kvm64.c
kvm_arm.h
kvm-consts.h
kvm-stub.c
kvm.c
machine.c
Makefile.objs
monitor.c
neon_helper.c
op_addsub.h
op_helper.c
psci.c
translate-a64.c
translate.c	target-arm: Don't permit ARMv8-only Neon insns on ARMv7	2016-06-14 16:01:03 +01:00
translate.h