a575230f95
Since aarch64 binaries are generally built for multiple page sizes, it is trivial to allow the page size to vary. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20240102015808.132373-31-richard.henderson@linaro.org>
41 lines
883 B
C
41 lines
883 B
C
/*
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* ARM cpu parameters for qemu.
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*
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* Copyright (c) 2003 Fabrice Bellard
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* SPDX-License-Identifier: LGPL-2.0+
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*/
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#ifndef ARM_CPU_PARAM_H
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#define ARM_CPU_PARAM_H
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#ifdef TARGET_AARCH64
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# define TARGET_LONG_BITS 64
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# define TARGET_PHYS_ADDR_SPACE_BITS 52
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# define TARGET_VIRT_ADDR_SPACE_BITS 52
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#else
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# define TARGET_LONG_BITS 32
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# define TARGET_PHYS_ADDR_SPACE_BITS 40
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# define TARGET_VIRT_ADDR_SPACE_BITS 32
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#endif
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#ifdef CONFIG_USER_ONLY
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# ifdef TARGET_AARCH64
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# define TARGET_TAGGED_ADDRESSES
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/* Allow user-only to vary page size from 4k */
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# define TARGET_PAGE_BITS_VARY
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# define TARGET_PAGE_BITS_MIN 12
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# else
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# define TARGET_PAGE_BITS 12
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# endif
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#else
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/*
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* ARMv7 and later CPUs have 4K pages minimum, but ARMv5 and v6
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* have to support 1K tiny pages.
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*/
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# define TARGET_PAGE_BITS_VARY
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# define TARGET_PAGE_BITS_MIN 10
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#endif
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#endif
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