qemu/tcg
Richard Henderson b881910859 tcg/ppc: Use new registers for LQ destination
LQ has a constraint that RTp != RA, else SIGILL.
Therefore, force the destination of INDEX_op_qemu_*_ld128 to be a
new register pair, so that it cannot overlap the input address.

This requires new support in process_op_defs and tcg_reg_alloc_op.

Cc: qemu-stable@nongnu.org
Fixes: 526cd4ec01 ("tcg/ppc: Support 128-bit load/store")
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240102013456.131846-1-richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
(cherry picked from commit ca5bed07d0)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2024-01-11 21:02:11 +03:00
..
aarch64 tcg: Remove TCG_TARGET_HAS_neg_{i32,i64} 2023-11-06 08:27:21 -08:00
arm tcg: Remove TCG_TARGET_HAS_neg_{i32,i64} 2023-11-06 08:27:21 -08:00
i386 tcg: Remove TCG_TARGET_HAS_neg_{i32,i64} 2023-11-06 08:27:21 -08:00
loongarch64 tcg/loongarch64: Fix tcg_out_mov() Aborted 2023-11-21 10:32:42 +08:00
mips tcg: Remove TCG_TARGET_HAS_neg_{i32,i64} 2023-11-06 08:27:21 -08:00
ppc tcg/ppc: Use new registers for LQ destination 2024-01-11 21:02:11 +03:00
riscv tcg: Remove TCG_TARGET_HAS_neg_{i32,i64} 2023-11-06 08:27:21 -08:00
s390x tcg: Remove TCG_TARGET_HAS_neg_{i32,i64} 2023-11-06 08:27:21 -08:00
sparc64 tcg/sparc64: Implement tcg_out_extrl_i64_i32 2023-11-06 10:48:46 -08:00
tci tcg: Remove TCG_TARGET_HAS_neg_{i32,i64} 2023-11-06 08:27:21 -08:00
meson.build tcg: Correct invalid mentions of 'softmmu' by 'system-mode' 2023-10-07 19:02:33 +02:00
optimize.c tcg/optimize: Canonicalize sub2 with constants to add2 2023-11-06 10:43:04 -08:00
region.c tcg: Correct invalid mentions of 'softmmu' by 'system-mode' 2023-10-07 19:02:33 +02:00
tcg-common.c tcg: Silent -Wmissing-field-initializers warning 2023-02-27 22:29:01 +01:00
tcg-internal.h tcg: Move tcg_constant_* out of line 2023-11-06 08:27:21 -08:00
tcg-ldst.c.inc tcg: Move TCGLabelQemuLdst to tcg.c 2023-05-05 17:21:03 +01:00
tcg-op-gvec.c tcg: Don't free vector results 2023-11-06 08:27:21 -08:00
tcg-op-ldst.c tcg: Reduce serial context atomicity earlier 2023-12-12 13:35:19 -08:00
tcg-op-vec.c tcg: Remove vecop_list check from tcg_gen_not_vec 2023-08-29 09:57:39 -07:00
tcg-op.c tcg: Canonicalize subi to addi during opcode generation 2023-11-06 10:43:04 -08:00
tcg-pool.c.inc tcg: Introduce tcg_splitwx_to_{rx,rw} 2021-01-07 05:09:41 -10:00
tcg.c tcg/ppc: Use new registers for LQ destination 2024-01-11 21:02:11 +03:00
tci.c tcg: Remove TCG_TARGET_HAS_neg_{i32,i64} 2023-11-06 08:27:21 -08:00