qemu/include
Peter Maydell 5f64adc138 target-arm queue:
* handle FTYPE flag correctly in v7M exception return
    for v7M CPUs with an FPU (v8M CPUs were already correct)
  * versal: Add the CRP as unimplemented
  * Fix ISR_EL1 tracking when executing at EL2
  * Honor HCR_EL2.TID3 trapping requirements
 -----BEGIN PGP SIGNATURE-----
 
 iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAl3dMqYZHHBldGVyLm1h
 eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3hnbD/4lQJUhXBeYSuZn4TcnjQ/S
 pVVhnxq/TkAkYv2lhUvD8a9MUkZbufXwOl9JbQK21vJamz1LlFqoXtrnJsjJrL53
 oHmPZXJ7dYJkOerszZfrGQ2+2hvX8uf62oaV9jdpNLOHQOSGCVjzHCf/cnqrC/W0
 dmbbYPOb2mO4JiTVa6HkKr54EjPPnIKoPAhctMNffc1Oatxh7hPXpZWmW+sJFxvx
 GwyZEZ39ySBeKxEsiRMOTB0JhJgsZ3atqmiCzabOn7tjipPY3/FWKqJq+XwZUG29
 kBv7BrO17s/5idpvg17Js16uUdwbU5G6tT5T73XFE3w+1MRl193cx2WPcO/Z1vze
 +RJDKvJRt5ttspX4+AqMgq5iX2C4f9FVgNI/szI3RvsopTnF0ZHhWW2EsFzK4jDT
 ieAJ8Il5D6m7uapSHop3A4uEN5EiK1HVrx+0EeIxiBT0/C132jCqiro3q2a+EwKZ
 nnplVCiSIecAT1XBy31lkYP5UlP4+eDxiBCJul2cnwpAUc7LFRO5KzfOkLlQNIGU
 ElCej4Ga8UjxWCAPgL34qkjODpX1izUQ7YltAWyFfmTkhv6m5o+u113b3bwPWyWD
 H1qq1UW6/MSaWV7pY8Kqas5krxEVn8lCfi3EKY6ReXLvvoN3m9GlFDwjMmTzwalL
 D0EfAoU/xoiZ0hxps0LX1A==
 =EFhx
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20191126' into staging

target-arm queue:
 * handle FTYPE flag correctly in v7M exception return
   for v7M CPUs with an FPU (v8M CPUs were already correct)
 * versal: Add the CRP as unimplemented
 * Fix ISR_EL1 tracking when executing at EL2
 * Honor HCR_EL2.TID3 trapping requirements

# gpg: Signature made Tue 26 Nov 2019 14:11:50 GMT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20191126:
  target/arm: Honor HCR_EL2.TID3 trapping requirements
  target/arm: Fix ISR_EL1 tracking when executing at EL2
  hw/arm: versal: Add the CRP as unimplemented
  target/arm: Fix handling of cortex-m FTYPE flag in EXCRET

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-11-26 18:37:49 +00:00
..
2019-11-18 16:01:34 -06:00
2019-10-30 14:10:32 +00:00
2019-09-17 13:42:02 +02:00
2019-10-28 15:12:38 +00:00