qemu/include/exec
Peter Maydell f7b78602fd accel/tcg: Add cluster number to TCG TB hash
Include the cluster number in the hash we use to look
up TBs. This is important because a TB that is valid
for one cluster at a given physical address and set
of CPU flags is not necessarily valid for another:
the two clusters may have different views of physical
memory, or may have different CPU features (eg FPU
present or absent).

We put the cluster number in the high 8 bits of the
TB cflags. This gives us up to 256 clusters, which should
be enough for anybody. If we ever need more, or need
more bits in cflags for other purposes, we could make
tb_hash_func() take more data (and expand qemu_xxhash7()
to qemu_xxhash8()).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20190121152218.9592-4-peter.maydell@linaro.org
2019-01-29 11:46:06 +00:00
..
user linux-user: Assert on bad type in thunk_type_align() and thunk_type_size() 2018-05-24 20:46:54 +02:00
address-spaces.h Clean up header guards that don't match their file name 2016-07-12 16:19:16 +02:00
cpu_ldst_template.h cputlb: read CPUTLBEntry.addr_write atomically 2018-10-18 19:46:53 -07:00
cpu_ldst_useronly_template.h linux-user: fix 32bit g2h()/h2g() 2018-08-17 13:56:33 +02:00
cpu_ldst.h cputlb: Remove static tlb sizing 2019-01-28 07:04:35 -08:00
cpu-all.h tcg: Define and use new tlb_hit() and tlb_hit_page() functions 2018-07-02 08:02:20 -07:00
cpu-common.h Rename cpu_physical_memory_write_rom() to address_space_write_rom() 2018-12-14 13:30:48 +00:00
cpu-defs.h cputlb: Remove static tlb sizing 2019-01-28 07:04:35 -08:00
cputlb.h cputlb: Count "partial" and "elided" tlb flushes 2018-10-31 12:16:30 +00:00
exec-all.h accel/tcg: Add cluster number to TCG TB hash 2019-01-29 11:46:06 +00:00
gdbstub.h gdbstub: Clarify what gdb_handlesig() is doing 2018-05-25 10:10:55 +02:00
gen-icount.h tcg: Pass tb and index to tcg_gen_exit_tb separately 2018-06-01 15:15:27 -07:00
helper-gen.h tcg: Allow 6 arguments to TCG helpers 2017-12-29 12:43:40 -08:00
helper-head.h tcg: Add TCG_CALL_NO_RETURN 2018-12-26 06:40:24 +11:00
helper-proto.h tcg: Allow 6 arguments to TCG helpers 2017-12-29 12:43:40 -08:00
helper-tcg.h tcg: Add TCG_CALL_NO_RETURN 2018-12-26 06:40:24 +11:00
hwaddr.h hw: Clean up includes 2016-06-07 18:19:23 +03:00
ioport.h hw: clean up hw/hw.h includes 2016-05-19 16:42:30 +02:00
log.h disas: Remove unused flags arguments 2017-10-25 11:55:09 +02:00
memattrs.h memory.h: Move MemTxResult type to memattrs.h 2017-09-04 15:21:54 +01:00
memory_ldst_cached.inc.h exec: reintroduce MemoryRegion caching 2018-05-09 00:13:38 +02:00
memory_ldst_phys.inc.h exec: move memory access declarations to a common header, inline *_phys functions 2018-05-09 00:13:38 +02:00
memory_ldst.inc.h exec: move memory access declarations to a common header, inline *_phys functions 2018-05-09 00:13:38 +02:00
memory-internal.h tcg: remove tb_lock 2018-06-15 08:18:48 -10:00
memory.h memory: add memory_region_flush_rom_device() 2019-01-29 11:46:04 +00:00
poison.h exec: Add RISC-V GCC poison macro 2018-12-26 06:40:02 +11:00
ram_addr.h COLO: Load dirty pages into SVM's RAM cache firstly 2018-10-19 11:15:03 +08:00
ramlist.h migration: Poison ramblock loops in migration 2018-06-15 14:40:56 +01:00
semihost.h
softmmu-semi.h Clean up decorations and whitespace around header guards 2016-07-12 16:20:46 +02:00
target_page.h migration: Make savevm.c target independent 2017-05-18 19:21:00 +02:00
tb-context.h tcg: remove tb_lock 2018-06-15 08:18:48 -10:00
tb-hash.h include: move exec/tb-hash-xx.h to qemu/xxhash.h 2018-12-17 06:04:44 +03:00
tb-lookup.h Clean up includes 2018-02-09 05:05:11 +01:00
translator.h translator: merge max_insns into DisasContextBase 2018-05-09 10:12:21 -07:00