Scott Wood a1bb73849f ppc/booke: fix crit/mcheck/debug exceptions
Book E does not play games with certain bits of xSRR1 being MSR save
bits and others being error status.  xSRR1 is the old MSR, period.
This was causing things like MSR[CE] to be lost, even in the saved
version, as soon as you take an exception.

rfci/rfdi/rfmci are fixed to pass the actual xSRR1 register contents,
rather than the register number.

Put FIXME comments on the hack that is "asrr0/1".  The whole point of
separate exception levels is so that you can, for example, take a machine
check or debug interrupt without corrupting critical-level operations.
The right xSRR0/1 set needs to be chosen based on CPU type flags.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07 17:37:10 +01:00
2012-12-17 14:01:41 +01:00
2012-12-19 08:29:06 +01:00
2012-12-22 12:06:48 +00:00
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2013-01-06 08:15:08 +00:00
2012-09-07 09:02:44 +03:00
2012-11-01 13:10:06 +01:00
2012-05-14 07:27:24 +02:00
2013-01-06 08:15:08 +00:00
2012-12-20 23:08:47 +01:00
2013-01-02 15:58:09 +01:00
2013-01-06 08:15:08 +00:00
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2012-12-03 14:08:40 -06:00
2012-12-22 12:04:44 +00:00

Read the documentation in qemu-doc.html or on http://wiki.qemu.org

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