Craig Janeczek a031ac6161 target/mips: Define a bit for MXU in insn_flags ...

Define a bit for MXU in insn_flags. This is the first non-MIPS
(third party) ASE supported in QEMU for MIPS, so it is placed in
the section "bits 56-63: vendor-specific ASEs".

Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Craig Janeczek <jancraig@amazon.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>

2018-10-29 14:13:47 +01:00

..

cp0_timer.c

mips: introduce internal.h and cleanup cpu.h

2017-09-21 13:24:34 +01:00

cpu-qom.h

mips: MIPSCPU model subclasses

2017-09-21 13:25:30 +01:00

cpu.c

target/mips: Add disassembler support for nanoMIPS

2018-10-25 22:13:33 +02:00

cpu.h

target/mips: Introduce MXU registers

2018-10-29 14:13:47 +01:00

dsp_helper.c

Remove unnecessary variables for function return value

2018-05-20 08:48:13 +03:00

gdbstub.c

target/mips: Fix gdbstub to read/write 64 bit FP registers

2018-06-27 20:13:50 +02:00

helper.c

target/mips: Implement hardware page table walker for MIPS32

2018-10-18 20:37:20 +02:00

helper.h

target/mips: Add CP0 PWCtl register

2018-10-18 20:37:20 +02:00

internal.h

target/mips: Implement hardware page table walker for MIPS32

2018-10-18 20:37:20 +02:00

kvm_mips.h

…

kvm.c

mips: introduce internal.h and cleanup cpu.h

2017-09-21 13:24:34 +01:00

lmi_helper.c

…

machine.c

target/mips: Add CP0 PWCtl register

2018-10-18 20:37:20 +02:00

Makefile.objs

mips: move hw/mips/cputimer.c to target/mips/

2017-09-21 13:24:34 +01:00

mips-defs.h

target/mips: Define a bit for MXU in insn_flags

2018-10-29 14:13:47 +01:00

mips-semi.c

…

msa_helper.c

target/mips: Remove floatX_maybe_silence_nan from conversions

2018-05-17 15:27:15 -07:00

op_helper.c

target/mips: Implement hardware page table walker for MIPS32

2018-10-18 20:37:20 +02:00

TODO

…

trace-events

…

translate_init.inc.c

target/mips: Define the R5900 CPU

2018-10-24 15:20:31 +02:00

translate.c

target/mips: Introduce MXU registers

2018-10-29 14:13:47 +01:00