qemu/target-sparc
Igor V. Kovalenko 9fd1ae3a0e sparc64: fix mmu context at trap levels above zero
- cpu_mmu_index return MMU_NUCLEUS_IDX if trap level is not zero
- cpu_get_tb_cpu_state: store trap level and primary context in flags
  this allows to restart code translation when address translation is changed
- stop translation block after writing to pstate and tl registers
- stop translation block after writing to alternate space
  this can be optimized to stop only if address translation can be changed
  by write operation (e.g. by comparing with MMU ASI values)

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22 12:51:48 +00:00
..
cpu.h sparc64: fix mmu context at trap levels above zero 2010-05-22 12:51:48 +00:00
exec.h sparc: move DT and QT defines to op_helper.c 2010-05-16 08:33:02 +00:00
helper.c sparc64: fix mmu context at trap levels above zero 2010-05-22 12:51:48 +00:00
helper.h target-sparc: Inline some generation of carry for ADDX/SUBX. 2010-05-20 19:58:28 +00:00
machine.c sparc: Fix lazy flag calculation on interrupts, refactor 2010-05-09 20:19:04 +00:00
op_helper.c sparc64: fix pstate privilege bits 2010-05-22 12:48:52 +00:00
TODO Remove unnecessary trailing newlines 2008-12-13 09:32:43 +00:00
translate.c sparc64: fix mmu context at trap levels above zero 2010-05-22 12:51:48 +00:00