Peter Maydell 9ee98ce810 target-arm: Implement setting of watchpoints ...

Implement support for setting QEMU watchpoints based on the
values the guest writes to the ARM architected watchpoint
registers. (We do not yet report the firing of the watchpoints
to the guest, so they will just be ignored.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

2014-09-12 14:06:49 +01:00

..

arm_ldst.h

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arm-semi.c

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cpu64.c

target-arm: Correct Cortex-A57 ISAR5 and AA64ISAR0 ID register values

2014-08-29 15:00:28 +01:00

cpu-qom.h

target-arm: Adjust debug ID registers per-CPU

2014-08-19 19:02:03 +01:00

cpu.c

target-arm: Implement setting of watchpoints

2014-09-12 14:06:49 +01:00

cpu.h

target-arm: Implement setting of watchpoints

2014-09-12 14:06:49 +01:00

crypto_helper.c

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gdbstub64.c

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gdbstub.c

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helper-a64.c

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helper-a64.h

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helper.c

target-arm: Implement setting of watchpoints

2014-09-12 14:06:49 +01:00

helper.h

target-arm: Implement ARMv8 single-step handling for A64 code

2014-08-19 19:02:03 +01:00

internals.h

target-arm: Implement setting of watchpoints

2014-09-12 14:06:49 +01:00

iwmmxt_helper.c

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kvm32.c

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kvm64.c

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kvm_arm.h

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kvm-consts.h

arm/virt: Use PSCI v0.2 function IDs in the DT when KVM uses PSCI v0.2

2014-08-19 19:02:25 +01:00

kvm-stub.c

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kvm.c

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machine.c

target-arm: Implement setting of watchpoints

2014-09-12 14:06:49 +01:00

Makefile.objs

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neon_helper.c

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op_addsub.h

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op_helper.c

target-arm: Implement ARMv8 single-step handling for A64 code

2014-08-19 19:02:03 +01:00

translate-a64.c

target-arm: Implement ARMv8 single-step handling for A64 code

2014-08-19 19:02:03 +01:00

translate.c

target-arm: Implement ARMv8 single-stepping for AArch32 code

2014-08-19 19:02:03 +01:00

translate.h

target-arm: Implement ARMv8 single-step handling for A64 code

2014-08-19 19:02:03 +01:00