9eb8040c2d
Add a model of the TrustZone peripheral protection controller (PPC), which is used to gate transactions to non-TZ-aware peripherals so that secure software can configure them to not be accessible to non-secure software. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180220180325.29818-15-peter.maydell@linaro.org
97 lines
5.7 KiB
Plaintext
97 lines
5.7 KiB
Plaintext
# See docs/devel/tracing.txt for syntax documentation.
|
|
|
|
# hw/misc/eccmemctl.c
|
|
ecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x"
|
|
ecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x"
|
|
ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status 0x%08x"
|
|
ecc_mem_writel_vcr(uint32_t val) "Write slot configuration 0x%08x"
|
|
ecc_mem_writel_dr(uint32_t val) "Write diagnostic 0x%08x"
|
|
ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 0x%08x"
|
|
ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 0x%08x"
|
|
ecc_mem_readl_mer(uint32_t ret) "Read memory enable 0x%08x"
|
|
ecc_mem_readl_mdr(uint32_t ret) "Read memory delay 0x%08x"
|
|
ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status 0x%08x"
|
|
ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration 0x%08x"
|
|
ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 0x%08x"
|
|
ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 0x%08x"
|
|
ecc_mem_readl_dr(uint32_t ret) "Read diagnostic 0x%08x"
|
|
ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 0x%08x"
|
|
ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 0x%08x"
|
|
ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = 0x%02x"
|
|
ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= 0x%02x"
|
|
|
|
# hw/misc/slavio_misc.c
|
|
slavio_misc_update_irq_raise(void) "Raise IRQ"
|
|
slavio_misc_update_irq_lower(void) "Lower IRQ"
|
|
slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
|
|
slavio_cfg_mem_writeb(uint32_t val) "Write config 0x%02x"
|
|
slavio_cfg_mem_readb(uint32_t ret) "Read config 0x%02x"
|
|
slavio_diag_mem_writeb(uint32_t val) "Write diag 0x%02x"
|
|
slavio_diag_mem_readb(uint32_t ret) "Read diag 0x%02x"
|
|
slavio_mdm_mem_writeb(uint32_t val) "Write modem control 0x%02x"
|
|
slavio_mdm_mem_readb(uint32_t ret) "Read modem control 0x%02x"
|
|
slavio_aux1_mem_writeb(uint32_t val) "Write aux1 0x%02x"
|
|
slavio_aux1_mem_readb(uint32_t ret) "Read aux1 0x%02x"
|
|
slavio_aux2_mem_writeb(uint32_t val) "Write aux2 0x%02x"
|
|
slavio_aux2_mem_readb(uint32_t ret) "Read aux2 0x%02x"
|
|
apc_mem_writeb(uint32_t val) "Write power management 0x%02x"
|
|
apc_mem_readb(uint32_t ret) "Read power management 0x%02x"
|
|
slavio_sysctrl_mem_writel(uint32_t val) "Write system control 0x%08x"
|
|
slavio_sysctrl_mem_readl(uint32_t ret) "Read system control 0x%08x"
|
|
slavio_led_mem_writew(uint32_t val) "Write diagnostic LED 0x%04x"
|
|
slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED 0x%04x"
|
|
|
|
# hw/misc/milkymist-hpdmc.c
|
|
milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x"
|
|
milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x"
|
|
|
|
# hw/misc/milkymist-pfpu.c
|
|
milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
|
|
milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
|
|
milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a 0x%08x b 0x%08x dma_ptr 0x%08x"
|
|
milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
|
|
|
|
# hw/misc/aspeed_scu.c
|
|
aspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32
|
|
|
|
# hw/misc/mps2_scc.c
|
|
mps2_scc_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
|
|
mps2_scc_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
|
|
mps2_scc_reset(void) "MPS2 SCC: reset"
|
|
mps2_scc_leds(char led7, char led6, char led5, char led4, char led3, char led2, char led1, char led0) "MPS2 SCC LEDs: %c%c%c%c%c%c%c%c"
|
|
mps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config write: function %d device %d data 0x%" PRIx32
|
|
mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config read: function %d device %d data 0x%" PRIx32
|
|
|
|
# hw/misc/mps2_fpgaio.c
|
|
mps2_fpgaio_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
|
|
mps2_fpgaio_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
|
|
mps2_fpgaio_reset(void) "MPS2 FPGAIO: reset"
|
|
mps2_fpgaio_leds(char led1, char led0) "MPS2 FPGAIO LEDs: %c%c"
|
|
|
|
# hw/misc/msf2-sysreg.c
|
|
msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" HWADDR_PRIx " data 0x%" PRIx32 " prev 0x%" PRIx32
|
|
msf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" HWADDR_PRIx " data 0x%08" PRIx32
|
|
msf2_sysreg_write_pll_status(void) "Invalid write to read only PLL status register"
|
|
|
|
#hw/misc/imx7_gpr.c
|
|
imx7_gpr_read(uint64_t offset) "addr 0x%08" HWADDR_PRIx
|
|
imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" HWADDR_PRIx "value 0x%08" HWADDR_PRIx
|
|
|
|
# hw/misc/mos6522.c
|
|
mos6522_set_counter(int index, unsigned int val) "T%d.counter=%d"
|
|
mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRId64 " delta_next=0x%"PRId64
|
|
mos6522_set_sr_int(void) "set sr_int"
|
|
mos6522_write(uint64_t addr, uint64_t val) "reg=0x%"PRIx64 " val=0x%"PRIx64
|
|
mos6522_read(uint64_t addr, unsigned val) "reg=0x%"PRIx64 " val=0x%x"
|
|
|
|
# hw/misc/tz-ppc.c
|
|
tz_ppc_reset(void) "TZ PPC: reset"
|
|
tz_ppc_cfg_nonsec(int n, int level) "TZ PPC: cfg_nonsec[%d] = %d"
|
|
tz_ppc_cfg_ap(int n, int level) "TZ PPC: cfg_ap[%d] = %d"
|
|
tz_ppc_cfg_sec_resp(int level) "TZ PPC: cfg_sec_resp = %d"
|
|
tz_ppc_irq_enable(int level) "TZ PPC: int_enable = %d"
|
|
tz_ppc_irq_clear(int level) "TZ PPC: int_clear = %d"
|
|
tz_ppc_update_irq(int level) "TZ PPC: setting irq line to %d"
|
|
tz_ppc_read_blocked(int n, hwaddr offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" HWADDR_PRIx " read (secure %d user %d) blocked"
|
|
tz_ppc_write_blocked(int n, hwaddr offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" HWADDR_PRIx " write (secure %d user %d) blocked"
|