qemu/target/loongarch/tcg
Xianglai Li 9c70db9a43 target/loongarch: Fix tlb huge page loading issue
When we use qemu tcg simulation, the page size of bios is 4KB.
When using the level 2 super huge page (page size is 1G) to create the page table,
it is found that the content of the corresponding address space is abnormal,
resulting in the bios can not start the operating system and graphical interface normally.

The lddir and ldpte instruction emulation has
a problem with the use of super huge page processing above level 2.
The page size is not correctly calculated,
resulting in the wrong page size of the table entry found by tlb.

Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240318070332.1273939-1-lixianglai@loongson.cn>
2024-03-20 10:20:03 +08:00
..
insn_trans target/loongarch: Rename MMU_IDX_* 2024-02-03 16:46:07 +10:00
constant_timer.c
csr_helper.c
fpu_helper.c
iocsr_helper.c hw/loongarch/virt: Set iocsr address space per-board rather than percpu 2024-01-11 19:22:47 +08:00
meson.build
op_helper.c
tlb_helper.c target/loongarch: Fix tlb huge page loading issue 2024-03-20 10:20:03 +08:00
translate.c bulk: Call in place single use cpu_env() 2024-03-12 11:46:16 +01:00
vec_helper.c