qemu/hw/timer
Peter Maydell b9e3f1579a hw/timer/renesas_tmr: Add default-case asserts in read_tcnt()
In commit 81b3ddaf87 we fixed a use of uninitialized data
in read_tcnt(). However this change wasn't enough to placate
Coverity, which is not smart enough to see that if we read a
2 bit field and then handle cases 0, 1, 2 and 3 then there cannot
be a flow of execution through the switch default. Add explicit
default cases which assert that they can't be reached, which
should help silence Coverity.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210319162458.13760-1-peter.maydell@linaro.org
2021-03-30 14:05:34 +01:00
..
a9gtimer.c
allwinner-a10-pit.c
altera_timer.c
arm_mptimer.c
arm_timer.c
armv7m_systick.c
aspeed_timer.c
avr_timer16.c
bcm2835_systmr.c
cadence_ttc.c
cmsdk-apb-dualtimer.c
cmsdk-apb-timer.c
digic-timer.c
etraxfs_timer.c
exynos4210_mct.c
exynos4210_pwm.c
grlib_gptimer.c
hpet.c
i8254_common.c
i8254.c
imx_epit.c
imx_gpt.c
Kconfig
lm32_timer.c
meson.build
milkymist-sysctl.c
mips_gictimer.c
mss-timer.c
npcm7xx_timer.c
nrf51_timer.c
omap_gptimer.c
omap_synctimer.c
puv3_ost.c
pxa2xx_timer.c
renesas_cmt.c
renesas_tmr.c hw/timer/renesas_tmr: Add default-case asserts in read_tcnt() 2021-03-30 14:05:34 +01:00
sh_timer.c
slavio_timer.c
sse-counter.c
sse-timer.c
stm32f2xx_timer.c
trace-events
trace.h
xilinx_timer.c