9b7b85d260
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162
551 lines
11 KiB
C
551 lines
11 KiB
C
/*
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* CRIS helper routines
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*
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* Copyright (c) 2007 AXIS Communications
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* Written by Edgar E. Iglesias
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <assert.h>
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#include "exec.h"
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#include "mmu.h"
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#define MMUSUFFIX _mmu
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#define SHIFT 0
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#include "softmmu_template.h"
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#define SHIFT 1
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#include "softmmu_template.h"
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#define SHIFT 2
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#include "softmmu_template.h"
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#define SHIFT 3
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#include "softmmu_template.h"
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#define D(x)
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/* Try to fill the TLB and return an exception if error. If retaddr is
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NULL, it means that the function was called in C code (i.e. not
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from generated code or from helper.c) */
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/* XXX: fix it to restore all registers */
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void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
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{
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TranslationBlock *tb;
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CPUState *saved_env;
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unsigned long pc;
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int ret;
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/* XXX: hack to restore env in all cases, even if not called from
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generated code */
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saved_env = env;
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env = cpu_single_env;
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D(fprintf(logfile, "%s pc=%x tpc=%x ra=%x\n", __func__,
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env->pc, env->debug1, retaddr));
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ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
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if (__builtin_expect(ret, 0)) {
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if (retaddr) {
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/* now we have a real cpu fault */
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pc = (unsigned long)retaddr;
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tb = tb_find_pc(pc);
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if (tb) {
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/* the PC is inside the translated code. It means that we have
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a virtual CPU fault */
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cpu_restore_state(tb, env, pc, NULL);
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}
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}
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cpu_loop_exit();
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}
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env = saved_env;
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}
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void helper_raise_exception(uint32_t index)
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{
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env->exception_index = index;
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cpu_loop_exit();
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}
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void helper_tlb_flush_pid(uint32_t pid)
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{
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#if !defined(CONFIG_USER_ONLY)
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cris_mmu_flush_pid(env, pid);
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#endif
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}
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void helper_tlb_flush(void)
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{
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tlb_flush(env, 1);
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}
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void helper_dump(uint32_t a0, uint32_t a1)
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{
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(fprintf(logfile, "%s: a0=%x a1=%x\n", __func__, a0, a1));
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}
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void helper_dummy(void)
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{
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}
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/* Used by the tlb decoder. */
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#define EXTRACT_FIELD(src, start, end) \
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(((src) >> start) & ((1 << (end - start + 1)) - 1))
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void helper_movl_sreg_reg (uint32_t sreg, uint32_t reg)
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{
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uint32_t srs;
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srs = env->pregs[PR_SRS];
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srs &= 3;
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env->sregs[srs][sreg] = env->regs[reg];
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#if !defined(CONFIG_USER_ONLY)
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if (srs == 1 || srs == 2) {
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if (sreg == 6) {
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/* Writes to tlb-hi write to mm_cause as a side
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effect. */
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env->sregs[SFR_RW_MM_TLB_HI] = T0;
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env->sregs[SFR_R_MM_CAUSE] = T0;
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}
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else if (sreg == 5) {
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uint32_t set;
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uint32_t idx;
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uint32_t lo, hi;
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uint32_t vaddr;
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int tlb_v;
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idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
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set >>= 4;
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set &= 3;
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idx &= 15;
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/* We've just made a write to tlb_lo. */
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lo = env->sregs[SFR_RW_MM_TLB_LO];
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/* Writes are done via r_mm_cause. */
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hi = env->sregs[SFR_R_MM_CAUSE];
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vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
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13, 31);
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vaddr <<= TARGET_PAGE_BITS;
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tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
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3, 3);
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env->tlbsets[srs - 1][set][idx].lo = lo;
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env->tlbsets[srs - 1][set][idx].hi = hi;
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D(fprintf(logfile,
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"tlb flush vaddr=%x v=%d pc=%x\n",
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vaddr, tlb_v, env->pc));
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tlb_flush_page(env, vaddr);
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}
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}
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#endif
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}
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void helper_movl_reg_sreg (uint32_t reg, uint32_t sreg)
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{
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uint32_t srs;
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env->pregs[PR_SRS] &= 3;
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srs = env->pregs[PR_SRS];
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#if !defined(CONFIG_USER_ONLY)
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if (srs == 1 || srs == 2)
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{
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uint32_t set;
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uint32_t idx;
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uint32_t lo, hi;
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idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
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set >>= 4;
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set &= 3;
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idx &= 15;
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/* Update the mirror regs. */
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hi = env->tlbsets[srs - 1][set][idx].hi;
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lo = env->tlbsets[srs - 1][set][idx].lo;
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env->sregs[SFR_RW_MM_TLB_HI] = hi;
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env->sregs[SFR_RW_MM_TLB_LO] = lo;
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}
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#endif
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env->regs[reg] = env->sregs[srs][sreg];
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RETURN();
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}
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static void cris_ccs_rshift(CPUState *env)
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{
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uint32_t ccs;
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/* Apply the ccs shift. */
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ccs = env->pregs[PR_CCS];
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ccs = (ccs & 0xc0000000) | ((ccs & 0x0fffffff) >> 10);
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if (ccs & U_FLAG)
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{
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/* Enter user mode. */
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env->ksp = env->regs[R_SP];
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env->regs[R_SP] = env->pregs[PR_USP];
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}
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env->pregs[PR_CCS] = ccs;
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}
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void helper_rfe(void)
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{
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D(fprintf(logfile, "rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
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env->pregs[PR_ERP], env->pregs[PR_PID],
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env->pregs[PR_CCS],
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env->btarget));
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cris_ccs_rshift(env);
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/* RFE sets the P_FLAG only if the R_FLAG is not set. */
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if (!(env->pregs[PR_CCS] & R_FLAG))
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env->pregs[PR_CCS] |= P_FLAG;
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}
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void helper_store(uint32_t a0)
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{
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if (env->pregs[PR_CCS] & P_FLAG )
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{
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cpu_abort(env, "cond_store_failed! pc=%x a0=%x\n",
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env->pc, a0);
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}
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}
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void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
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int is_asi)
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{
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D(printf("%s addr=%x w=%d ex=%d asi=%d\n",
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__func__, addr, is_write, is_exec, is_asi));
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}
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static void evaluate_flags_writeback(uint32_t flags)
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{
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int x;
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/* Extended arithmetics, leave the z flag alone. */
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env->debug3 = env->pregs[PR_CCS];
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if (env->cc_x_live)
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x = env->cc_x;
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else
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x = env->pregs[PR_CCS] & X_FLAG;
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if ((x || env->cc_op == CC_OP_ADDC)
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&& flags & Z_FLAG)
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env->cc_mask &= ~Z_FLAG;
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/* all insn clear the x-flag except setf or clrf. */
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env->pregs[PR_CCS] &= ~(env->cc_mask | X_FLAG);
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flags &= env->cc_mask;
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env->pregs[PR_CCS] |= flags;
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}
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void helper_evaluate_flags_muls(void)
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{
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uint32_t src;
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uint32_t dst;
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uint32_t res;
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uint32_t flags = 0;
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int64_t tmp;
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int32_t mof;
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int dneg;
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src = env->cc_src;
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dst = env->cc_dest;
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res = env->cc_result;
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dneg = ((int32_t)res) < 0;
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mof = env->pregs[PR_MOF];
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tmp = mof;
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tmp <<= 32;
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tmp |= res;
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if (tmp == 0)
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flags |= Z_FLAG;
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else if (tmp < 0)
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flags |= N_FLAG;
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if ((dneg && mof != -1)
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|| (!dneg && mof != 0))
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flags |= V_FLAG;
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evaluate_flags_writeback(flags);
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}
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void helper_evaluate_flags_mulu(void)
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{
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uint32_t src;
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uint32_t dst;
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uint32_t res;
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uint32_t flags = 0;
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uint64_t tmp;
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uint32_t mof;
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src = env->cc_src;
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dst = env->cc_dest;
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res = env->cc_result;
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mof = env->pregs[PR_MOF];
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tmp = mof;
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tmp <<= 32;
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tmp |= res;
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if (tmp == 0)
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flags |= Z_FLAG;
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else if (tmp >> 63)
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flags |= N_FLAG;
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if (mof)
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flags |= V_FLAG;
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evaluate_flags_writeback(flags);
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}
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void helper_evaluate_flags_mcp(void)
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{
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uint32_t src;
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uint32_t dst;
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uint32_t res;
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uint32_t flags = 0;
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src = env->cc_src;
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dst = env->cc_dest;
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res = env->cc_result;
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if ((res & 0x80000000L) != 0L)
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{
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flags |= N_FLAG;
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if (((src & 0x80000000L) == 0L)
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&& ((dst & 0x80000000L) == 0L))
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{
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flags |= V_FLAG;
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}
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else if (((src & 0x80000000L) != 0L) &&
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((dst & 0x80000000L) != 0L))
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{
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flags |= R_FLAG;
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}
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}
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else
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{
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if (res == 0L)
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flags |= Z_FLAG;
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if (((src & 0x80000000L) != 0L)
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&& ((dst & 0x80000000L) != 0L))
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flags |= V_FLAG;
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if ((dst & 0x80000000L) != 0L
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|| (src & 0x80000000L) != 0L)
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flags |= R_FLAG;
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}
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evaluate_flags_writeback(flags);
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}
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void helper_evaluate_flags_alu_4(void)
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{
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uint32_t src;
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uint32_t dst;
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uint32_t res;
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uint32_t flags = 0;
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src = env->cc_src;
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dst = env->cc_dest;
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res = env->cc_result;
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if ((res & 0x80000000L) != 0L)
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{
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flags |= N_FLAG;
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if (((src & 0x80000000L) == 0L)
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&& ((dst & 0x80000000L) == 0L))
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{
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flags |= V_FLAG;
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}
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else if (((src & 0x80000000L) != 0L) &&
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((dst & 0x80000000L) != 0L))
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{
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flags |= C_FLAG;
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}
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}
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else
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{
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if (res == 0L)
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flags |= Z_FLAG;
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if (((src & 0x80000000L) != 0L)
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&& ((dst & 0x80000000L) != 0L))
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flags |= V_FLAG;
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if ((dst & 0x80000000L) != 0L
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|| (src & 0x80000000L) != 0L)
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flags |= C_FLAG;
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}
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if (env->cc_op == CC_OP_SUB
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|| env->cc_op == CC_OP_CMP) {
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flags ^= C_FLAG;
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}
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evaluate_flags_writeback(flags);
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}
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void helper_evaluate_flags_move_4 (void)
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{
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uint32_t src;
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uint32_t res;
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uint32_t flags = 0;
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src = env->cc_src;
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res = env->cc_result;
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if ((int32_t)res < 0)
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flags |= N_FLAG;
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else if (res == 0L)
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flags |= Z_FLAG;
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evaluate_flags_writeback(flags);
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}
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void helper_evaluate_flags_move_2 (void)
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{
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uint32_t src;
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uint32_t flags = 0;
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uint16_t res;
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src = env->cc_src;
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res = env->cc_result;
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if ((int16_t)res < 0L)
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flags |= N_FLAG;
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else if (res == 0)
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flags |= Z_FLAG;
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evaluate_flags_writeback(flags);
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}
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/* TODO: This is expensive. We could split things up and only evaluate part of
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CCR on a need to know basis. For now, we simply re-evaluate everything. */
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void helper_evaluate_flags (void)
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{
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uint32_t src;
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uint32_t dst;
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uint32_t res;
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uint32_t flags = 0;
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src = env->cc_src;
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dst = env->cc_dest;
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res = env->cc_result;
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/* Now, evaluate the flags. This stuff is based on
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Per Zander's CRISv10 simulator. */
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switch (env->cc_size)
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{
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case 1:
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if ((res & 0x80L) != 0L)
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{
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flags |= N_FLAG;
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if (((src & 0x80L) == 0L)
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&& ((dst & 0x80L) == 0L))
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{
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flags |= V_FLAG;
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}
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else if (((src & 0x80L) != 0L)
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&& ((dst & 0x80L) != 0L))
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{
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flags |= C_FLAG;
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}
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}
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else
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{
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if ((res & 0xFFL) == 0L)
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{
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flags |= Z_FLAG;
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}
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if (((src & 0x80L) != 0L)
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&& ((dst & 0x80L) != 0L))
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{
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flags |= V_FLAG;
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}
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if ((dst & 0x80L) != 0L
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|| (src & 0x80L) != 0L)
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{
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flags |= C_FLAG;
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}
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}
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break;
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case 2:
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if ((res & 0x8000L) != 0L)
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{
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flags |= N_FLAG;
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if (((src & 0x8000L) == 0L)
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&& ((dst & 0x8000L) == 0L))
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{
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flags |= V_FLAG;
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}
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else if (((src & 0x8000L) != 0L)
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&& ((dst & 0x8000L) != 0L))
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{
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flags |= C_FLAG;
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}
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}
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else
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{
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if ((res & 0xFFFFL) == 0L)
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{
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flags |= Z_FLAG;
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}
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if (((src & 0x8000L) != 0L)
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&& ((dst & 0x8000L) != 0L))
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{
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flags |= V_FLAG;
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}
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if ((dst & 0x8000L) != 0L
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|| (src & 0x8000L) != 0L)
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{
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flags |= C_FLAG;
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}
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}
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break;
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case 4:
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if ((res & 0x80000000L) != 0L)
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{
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flags |= N_FLAG;
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if (((src & 0x80000000L) == 0L)
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&& ((dst & 0x80000000L) == 0L))
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{
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flags |= V_FLAG;
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}
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else if (((src & 0x80000000L) != 0L) &&
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((dst & 0x80000000L) != 0L))
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{
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flags |= C_FLAG;
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}
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}
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else
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{
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if (res == 0L)
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flags |= Z_FLAG;
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if (((src & 0x80000000L) != 0L)
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&& ((dst & 0x80000000L) != 0L))
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flags |= V_FLAG;
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if ((dst & 0x80000000L) != 0L
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|| (src & 0x80000000L) != 0L)
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flags |= C_FLAG;
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}
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break;
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default:
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break;
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}
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if (env->cc_op == CC_OP_SUB
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|| env->cc_op == CC_OP_CMP) {
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flags ^= C_FLAG;
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}
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|
evaluate_flags_writeback(flags);
|
|
}
|