Peter Maydell e4d51ac692 target/arm: Don't decode insns in the XScale/iWMMXt space as cp insns ... In commit cd8be50e58 we converted the A32 coprocessor insns to decodetree. This accidentally broke XScale/iWMMXt insns, because it moved the handling of "cp insns which are handled by looking up the cp register in the hashtable" from after the call to the legacy disas_xscale_insn() decode to before it, with the result that all XScale/iWMMXt insns now UNDEF. Update valid_cp() so that it knows that on XScale cp 0 and 1 are not standard coprocessor instructions; this will cause the decodetree trans_ functions to ignore them, so that execution will correctly get through to the legacy decode again. Cc: qemu-stable@nongnu.org Reported-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20210108195157.32067-1-peter.maydell@linaro.org		2021-01-12 21:19:02 +00:00
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a32-uncond.decode
a32.decode
arch_dump.c
arm_ldst.h
arm-powerctl.c
arm-powerctl.h
arm-semi.c
cpu64.c
cpu_tcg.c
cpu-param.h
cpu-qom.h
cpu.c
cpu.h
crypto_helper.c
debug_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c
helper-a64.h
helper-sve.h
helper.c
helper.h
idau.h
internals.h
iwmmxt_helper.c
kvm64.c
kvm_arm.h
kvm-consts.h
kvm-stub.c
kvm.c
m_helper.c
m-nocp.decode
machine.c
meson.build
monitor.c
mte_helper.c
neon_helper.c
neon-dp.decode
neon-ls.decode
neon-shared.decode
op_addsub.h
op_helper.c
pauth_helper.c
psci.c
sve_helper.c
sve.decode
t16.decode
t32.decode
tlb_helper.c
trace-events
trace.h
translate-a64.c
translate-a64.h
translate-neon.c.inc
translate-sve.c
translate-vfp.c.inc
translate.c	target/arm: Don't decode insns in the XScale/iWMMXt space as cp insns	2021-01-12 21:19:02 +00:00
translate.h
vec_helper.c
vec_internal.h
vfp_helper.c
vfp-uncond.decode
vfp.decode