qemu/target
Peter Maydell 99c7834fba hw/intc/armv7m_nvic: Update FPDSCR masking for v8.1M
The FPDSCR register has a similar layout to the FPSCR.  In v8.1M it
gains new fields FZ16 (if half-precision floating point is supported)
and LTPSIZE (always reads as 4).  Update the reset value and the code
that handles writes to this register accordingly.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201119215617.29887-16-peter.maydell@linaro.org
2020-12-10 11:44:55 +00:00
..
alpha overall/alpha tcg cpus|hppa: Fix Lesser GPL version number 2020-11-15 16:43:54 +01:00
arm hw/intc/armv7m_nvic: Update FPDSCR masking for v8.1M 2020-12-10 11:44:55 +00:00
avr qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros 2020-09-18 14:12:32 -04:00
cris cris tcg cpus: Fix Lesser GPL version number 2020-11-15 16:39:05 +01:00
hppa overall/alpha tcg cpus|hppa: Fix Lesser GPL version number 2020-11-15 16:43:54 +01:00
i386 hvf: Fix segment selector format 2020-11-18 09:32:17 +01:00
lm32 nomaintainer: Fix Lesser GPL version number 2020-11-15 17:04:40 +01:00
m68k hmp: Pass monitor to mon_get_cpu_env() 2020-11-13 12:45:51 +00:00
microblaze target/microblaze: Fix possible array out of bounds in mmu_write() 2020-11-17 09:45:24 +01:00
mips target/mips: Fix PageMask with variable page size 2020-11-09 00:31:49 +01:00
moxie qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros 2020-09-18 14:12:32 -04:00
nios2 hmp: Pass monitor to mon_get_cpu_env() 2020-11-13 12:45:51 +00:00
openrisc target/openrisc: Remove dead code attempting to check "is timer disabled" 2020-11-17 12:56:32 +00:00
ppc ppc/translate: Implement lxvwsx opcode 2020-11-24 11:34:18 +11:00
riscv hmp: Pass monitor to mon_get_cpu_env() 2020-11-13 12:45:51 +00:00
rx target/rx: Fix Lesser GPL version number 2020-10-27 00:22:56 +01:00
s390x s390/kvm: fix diag318 propagation and reset functionality 2020-11-18 16:57:48 +01:00
sh4 hmp: Pass monitor to mon_get_cpu_env() 2020-11-13 12:45:51 +00:00
sparc sparc tcg cpus: Fix Lesser GPL version number 2020-11-15 16:46:00 +01:00
tilegx nomaintainer: Fix Lesser GPL version number 2020-11-15 17:04:40 +01:00
tricore tricore tcg cpus: Fix Lesser GPL version number 2020-11-15 16:40:30 +01:00
unicore32 qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros 2020-09-18 14:12:32 -04:00
xtensa xtensa tcg cpus: Fix Lesser GPL version number 2020-11-15 16:40:15 +01:00
meson.build meson: target 2020-08-21 06:30:35 -04:00