qemu/target
Igor Mammedov 98aca24363 microblaze: replace cpu_mb_init() with cpu_generic_init()
cpu_mb_init() always falls back to TYPE_MICROBLAZE_CPU object
regardless of cpu_model. Put fallback logic into
mb_cpu_class_by_name() which would translate any cpu_model
into TYPE_MICROBLAZE_CPU class and replace cpu_mb_init()
with cpu_generic_init().

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <1503592308-93913-13-git-send-email-imammedo@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-09-01 11:54:24 -03:00
..
alpha alpha: replace cpu_alpha_init() with cpu_generic_init() 2017-09-01 11:54:24 -03:00
arm target/arm: Require alignment for load exclusive 2017-08-15 17:38:44 +01:00
cris tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
hppa hppa: replace cpu_hppa_init() with cpu_generic_init() 2017-09-01 11:54:24 -03:00
i386 target-i386/cpu: Add new EPYC CPU model 2017-09-01 11:54:24 -03:00
lm32 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
m68k m68k: replace cpu_m68k_init() with cpu_generic_init() 2017-09-01 11:54:24 -03:00
microblaze microblaze: replace cpu_mb_init() with cpu_generic_init() 2017-09-01 11:54:24 -03:00
mips target/mips: Fix RDHWR CC with icount 2017-08-02 22:18:13 +01:00
moxie tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
nios2 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
openrisc tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
ppc ppc: use DIV_ROUND_UP 2017-08-31 12:29:07 +02:00
s390x s390x: replace cpu_s390x_init() with cpu_generic_init() 2017-09-01 11:54:24 -03:00
sh4 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
sparc sparc: replace cpu_sparc_init() with cpu_generic_init() 2017-09-01 11:54:24 -03:00
tilegx tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
tricore qemu-system-tricore: segfault when entering "x 0" on the monitor 2017-07-31 13:06:38 +03:00
unicore32 unicore32: abort when entering "x 0" on the monitor 2017-08-14 13:06:54 +03:00
xtensa tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00