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qemu/target/mips/tcg
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Jiaxun Yang 2a2105a262 target/mips: Don't check COP1X for 64 bit FP mode 
Some implementations (i.e. Loongson-2F) may decide to implement
a 64 bit FPU without implementing COP1X instructions.

As the eligibility of 64 bit FP instructions is already determined
by CP0St_FR, there is no need to check for COP1X again.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221102165719.190378-1-jiaxun.yang@flygoat.com>
[PMD: Add missing trailing parenthesis (buildfix)]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2022-11-08 01:04:25 +01:00
..
sysemu accel/tcg: Introduce tb_pc and log_pc 2022-10-04 12:13:12 -07:00
dsp_helper.c
exception.c accel/tcg: Introduce tb_pc and log_pc 2022-10-04 12:13:12 -07:00
fpu_helper.c
ldst_helper.c target/mips: Replace GET_LMASK64() macro by get_lmask(64) function 2021-08-25 13:02:14 +02:00
lmmi_helper.c Replace config-time define HOST_WORDS_BIGENDIAN 2022-04-06 10:50:37 +02:00
meson.build target/mips: introduce decodetree structure for Cavium Octeon extension 2022-07-12 22:30:09 +02:00
micromips_translate.c.inc target/mips: Honour -semihosting-config userspace=on 2022-09-13 17:18:21 +01:00
mips16e_translate.c.inc target/mips: Honour -semihosting-config userspace=on 2022-09-13 17:18:21 +01:00
msa_helper.c target/mips: Fix store adress of high 64bit in helper_msa_st_b() 2022-06-11 11:34:12 +02:00
msa_helper.h.inc
msa_translate.c target/mips: Fix FTRUNC_S and FTRUNC_U trans helper 2022-06-11 11:34:12 +02:00
msa.decode target/mips: Remove one MSA unnecessary decodetree overlap group 2021-11-02 14:32:32 +01:00
mxu_translate.c target/mips: Fix gen_mxu_s32ldd_s32lddr 2021-06-29 10:04:57 -07:00
nanomips_translate.c.inc target/mips: Honour -semihosting-config userspace=on 2022-09-13 17:18:21 +01:00
octeon_translate.c target/mips: implement Octeon-specific arithmetic instructions 2022-07-12 22:30:19 +02:00
octeon.decode target/mips: Cast offset field of Octeon BBIT to int16_t 2022-11-08 01:04:25 +01:00
op_helper.c target/mips: Extract NEC Vr54xx helpers to vr54xx_helper.c 2021-08-25 13:02:14 +02:00
rel6_translate.c target/mips: Rename 'rtype' as 'r' 2021-08-25 13:02:14 +02:00
rel6.decode target/mips: Rename 'rtype' as 'r' 2021-08-25 13:02:14 +02:00
sysemu_helper.h.inc target/mips: Use an exception for semihosting 2022-06-28 10:13:42 +05:30
tcg-internal.h target/mips: Convert to tcg_ops restore_state_to_opc 2022-10-26 11:11:28 +10:00
trace-events target/mips: Move TCG trace events to tcg/ sub directory 2021-06-24 16:48:07 +02:00
trace.h target/mips: Move TCG trace events to tcg/ sub directory 2021-06-24 16:48:07 +02:00
translate_addr_const.c
translate.c target/mips: Don't check COP1X for 64 bit FP mode 2022-11-08 01:04:25 +01:00
translate.h target/mips: Advance pc after semihosting exception 2022-08-02 12:34:00 -07:00
tx79_translate.c exec/memop: Adding signedness to quad definitions 2022-01-08 15:46:10 +10:00
tx79.decode target/mips: Rename 'rtype' as 'r' 2021-08-25 13:02:14 +02:00
txx9_translate.c
vr54xx_helper.c target/mips: Extract NEC Vr54xx helpers to vr54xx_helper.c 2021-08-25 13:02:14 +02:00
vr54xx_helper.h.inc target/mips: Extract NEC Vr54xx helper definitions 2021-08-25 13:02:14 +02:00
vr54xx_translate.c target/mips: Convert Vr54xx MSA* opcodes to decodetree 2021-08-25 13:02:14 +02:00
vr54xx.decode target/mips: Convert Vr54xx MSA* opcodes to decodetree 2021-08-25 13:02:14 +02:00