qemu/target/ppc
David Gibson 4550f6a5da target/ppc: Don't bother with MSR_EP in cpu_ppc_set_papr()
cpu_ppc_set_papr() removes the EP and HV bits from the MSR mask.  While
removing the HV bit makes sense (a cpu in PAPR mode should never be
emulated in hypervisor mode), the EP bit is just bizarre.  Although it's
true that a papr mode guest shouldn't be able to change the exception
prefix, the MSR[EP] bit doesn't even exist on the cpus supported for PAPR
mode, so it's pointless to do anything with it here.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Thomas Huth <thuth@redhat.com>
2018-04-27 18:05:23 +10:00
..
translate
arch_dump.c
compat.c
cpu-models.c
cpu-models.h
cpu-qom.h target/ppc: Get rid of POWERPC_MMU_VER() macros 2018-04-27 18:05:22 +10:00
cpu.c
cpu.h target/ppc: Fold slb_nr into PPCHash64Options 2018-04-27 18:05:22 +10:00
dfp_helper.c
excp_helper.c
fpu_helper.c
gdbstub.c ppc: Fix size of ppc64 xer register 2018-04-27 18:05:22 +10:00
helper_regs.h
helper.h
int_helper.c
internal.h
kvm_ppc.h
kvm-stub.c
kvm.c target/ppc: Fold slb_nr into PPCHash64Options 2018-04-27 18:05:22 +10:00
machine.c target/ppc: Fold slb_nr into PPCHash64Options 2018-04-27 18:05:22 +10:00
Makefile.objs
mem_helper.c
mfrom_table_gen.c
mfrom_table.c
misc_helper.c
mmu_helper.c target/ppc: Get rid of POWERPC_MMU_VER() macros 2018-04-27 18:05:22 +10:00
mmu-book3s-v3.c
mmu-book3s-v3.h
mmu-hash32.c
mmu-hash32.h
mmu-hash64.c target/ppc: Fold slb_nr into PPCHash64Options 2018-04-27 18:05:22 +10:00
mmu-hash64.h target/ppc: Fold slb_nr into PPCHash64Options 2018-04-27 18:05:22 +10:00
mmu-radix64.c
mmu-radix64.h
monitor.c
timebase_helper.c
trace-events
translate_init.c target/ppc: Don't bother with MSR_EP in cpu_ppc_set_papr() 2018-04-27 18:05:23 +10:00
translate.c target/ppc: Get rid of POWERPC_MMU_VER() macros 2018-04-27 18:05:22 +10:00
user_only_helper.c