qemu/target/i386/tcg
Ruihan Li 97ffb29998 target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK
When emulated with QEMU, interrupts will never come in the following
loop. However, if the NOP instruction is uncommented, interrupts will
fire as normal.

	loop:
		cli
    		call do_sti
		jmp loop

	do_sti:
		sti
		# nop
		ret

This behavior is different from that of a real processor. For example,
if KVM is enabled, interrupts will always fire regardless of whether the
NOP instruction is commented or not. Also, the Intel Software Developer
Manual states that after the STI instruction is executed, the interrupt
inhibit should end as soon as the next instruction (e.g., the RET
instruction if the NOP instruction is commented) is executed.

This problem is caused because the previous code may choose not to end
the TB even if the HF_INHIBIT_IRQ_MASK has just been reset (e.g., in the
case where the STI instruction is immediately followed by the RET
instruction), so that IRQs may not have a change to trigger. This commit
fixes the problem by always terminating the current TB to give IRQs a
chance to trigger when HF_INHIBIT_IRQ_MASK is reset.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ruihan Li <lrh2000@pku.edu.cn>
Message-ID: <20240415064518.4951-4-lrh2000@pku.edu.cn>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
(cherry picked from commit 6a5a63f74b)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2024-05-09 16:35:02 +03:00
..
sysemu target/i386/tcg: Enable page walking from MMIO memory 2024-03-26 14:23:50 +01:00
user target/i386: implement SYSCALL/SYSRET in 32-bit emulators 2023-06-26 10:23:56 +02:00
bpt_helper.c compiler.h: replace QEMU_NORETURN with G_NORETURN 2022-04-21 17:03:51 +04:00
cc_helper_template.h.inc target/i386: Rename helper template headers as '.h.inc' 2023-06-13 11:28:58 +02:00
cc_helper.c target/i386: clean up cpu_cc_compute_all 2023-12-29 22:03:02 +01:00
decode-new.c.inc target/i386: implement CMPccXADD 2023-12-29 22:04:40 +01:00
decode-new.h target/i386: implement CMPccXADD 2023-12-29 22:04:40 +01:00
emit.c.inc target/i386: implement CMPccXADD 2023-12-29 22:04:40 +01:00
excp_helper.c target/i386: remove unnecessary arguments from raise_interrupt 2023-12-29 22:02:55 +01:00
fpu_helper.c target/i386: clean up cpu_cc_compute_all 2023-12-29 22:03:02 +01:00
helper-tcg.h target/i386: Extract x86_cpu_exec_halt() from accel/tcg/ 2024-01-29 21:04:10 +10:00
int_helper.c target/i386: clean up cpu_cc_compute_all 2023-12-29 22:03:02 +01:00
mem_helper.c target/i386: Inline cmpxchg16b 2023-02-04 06:19:43 -10:00
meson.build i386: split svm_helper into sysemu and stub-only user 2021-05-10 15:41:51 -04:00
misc_helper.c target/i386: clean up cpu_cc_compute_all 2023-12-29 22:03:02 +01:00
mpx_helper.c i386: move TCG cpu class initialization to tcg/ 2020-12-16 15:50:33 -05:00
ops_sse_header.h.inc target/i386: implement SHA instructions 2023-10-25 17:35:07 +02:00
seg_helper.c target/i386: clean up cpu_cc_compute_all 2023-12-29 22:03:02 +01:00
seg_helper.h i386: split seg_helper into user-only and sysemu parts 2021-05-10 15:41:52 -04:00
shift_helper_template.h.inc target/i386: Rename helper template headers as '.h.inc' 2023-06-13 11:28:58 +02:00
tcg-cpu.c target/i386: Extract x86_cpu_exec_halt() from accel/tcg/ 2024-01-29 21:04:10 +10:00
tcg-cpu.h target/i386: Move X86XSaveArea into TCG 2021-07-06 08:33:51 +02:00
tcg-stub.c
translate.c target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK 2024-05-09 16:35:02 +03:00