c165473269
We set default boot order "cad" in every single machine definition except "pseries" and "moxiesim", even though very few boards actually care for boot order, and "cad" makes sense for even fewer. Machines that care: * pc and its variants Accept up to three letters 'a', 'b' (undocumented alias for 'a'), 'c', 'd' and 'n'. Reject all others (fatal with -boot). * nseries (n800, n810) Check whether order starts with 'n'. Silently ignored otherwise. * prep, g3beige, mac99 Extract the first character the machine understands (subset of 'a'..'f'). Silently ignored otherwise. * spapr Accept an arbitrary string (vl.c restricts it to contain only 'a'..'p', no duplicates). * sun4[mdc] Use the first character. Silently ignored otherwise. Strip characters these machines ignore from their default boot order. For all other machines, remove the unused default boot order alltogether. Note that my rename of QEMUMachine member boot_order to default_boot_order and QEMUMachineInitArgs member boot_device to boot_order has a welcome side effect: it makes every use of boot orders visible in this patch, for easy review. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
237 lines
7.5 KiB
C
237 lines
7.5 KiB
C
/* omap_sx1.c Support for the Siemens SX1 smartphone emulation.
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*
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* Copyright (C) 2008
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* Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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* Copyright (C) 2007 Vladimir Ananiev <vovan888@gmail.com>
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*
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* based on PalmOne's (TM) PDAs support (palm.c)
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*/
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/*
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* PalmOne's (TM) PDAs.
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*
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* Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hw/hw.h"
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#include "ui/console.h"
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#include "hw/arm/omap.h"
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#include "hw/boards.h"
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#include "hw/arm/arm.h"
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#include "hw/block/flash.h"
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#include "sysemu/blockdev.h"
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#include "exec/address-spaces.h"
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/*****************************************************************************/
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/* Siemens SX1 Cellphone V1 */
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/* - ARM OMAP310 processor
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* - SRAM 192 kB
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* - SDRAM 32 MB at 0x10000000
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* - Boot flash 16 MB at 0x00000000
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* - Application flash 8 MB at 0x04000000
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* - 3 serial ports
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* - 1 SecureDigital
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* - 1 LCD display
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* - 1 RTC
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*/
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/*****************************************************************************/
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/* Siemens SX1 Cellphone V2 */
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/* - ARM OMAP310 processor
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* - SRAM 192 kB
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* - SDRAM 32 MB at 0x10000000
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* - Boot flash 32 MB at 0x00000000
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* - 3 serial ports
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* - 1 SecureDigital
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* - 1 LCD display
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* - 1 RTC
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*/
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static uint64_t static_read(void *opaque, hwaddr offset,
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unsigned size)
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{
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uint32_t *val = (uint32_t *) opaque;
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uint32_t mask = (4 / size) - 1;
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return *val >> ((offset & mask) << 3);
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}
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static void static_write(void *opaque, hwaddr offset,
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uint64_t value, unsigned size)
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{
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#ifdef SPY
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printf("%s: value %" PRIx64 " %u bytes written at 0x%x\n",
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__func__, value, size, (int)offset);
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#endif
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}
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static const MemoryRegionOps static_ops = {
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.read = static_read,
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.write = static_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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#define sdram_size 0x02000000
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#define sector_size (128 * 1024)
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#define flash0_size (16 * 1024 * 1024)
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#define flash1_size ( 8 * 1024 * 1024)
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#define flash2_size (32 * 1024 * 1024)
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#define total_ram_v1 (sdram_size + flash0_size + flash1_size + OMAP15XX_SRAM_SIZE)
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#define total_ram_v2 (sdram_size + flash2_size + OMAP15XX_SRAM_SIZE)
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static struct arm_boot_info sx1_binfo = {
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.loader_start = OMAP_EMIFF_BASE,
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.ram_size = sdram_size,
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.board_id = 0x265,
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};
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static void sx1_init(QEMUMachineInitArgs *args, const int version)
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{
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struct omap_mpu_state_s *mpu;
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MemoryRegion *address_space = get_system_memory();
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MemoryRegion *flash = g_new(MemoryRegion, 1);
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MemoryRegion *flash_1 = g_new(MemoryRegion, 1);
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MemoryRegion *cs = g_new(MemoryRegion, 4);
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static uint32_t cs0val = 0x00213090;
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static uint32_t cs1val = 0x00215070;
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static uint32_t cs2val = 0x00001139;
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static uint32_t cs3val = 0x00001139;
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DriveInfo *dinfo;
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int fl_idx;
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uint32_t flash_size = flash0_size;
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int be;
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if (version == 2) {
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flash_size = flash2_size;
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}
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mpu = omap310_mpu_init(address_space, sx1_binfo.ram_size, args->cpu_model);
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/* External Flash (EMIFS) */
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memory_region_init_ram(flash, NULL, "omap_sx1.flash0-0", flash_size);
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vmstate_register_ram_global(flash);
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memory_region_set_readonly(flash, true);
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memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash);
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memory_region_init_io(&cs[0], NULL, &static_ops, &cs0val,
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"sx1.cs0", OMAP_CS0_SIZE - flash_size);
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memory_region_add_subregion(address_space,
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OMAP_CS0_BASE + flash_size, &cs[0]);
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memory_region_init_io(&cs[2], NULL, &static_ops, &cs2val,
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"sx1.cs2", OMAP_CS2_SIZE);
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memory_region_add_subregion(address_space,
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OMAP_CS2_BASE, &cs[2]);
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memory_region_init_io(&cs[3], NULL, &static_ops, &cs3val,
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"sx1.cs3", OMAP_CS3_SIZE);
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memory_region_add_subregion(address_space,
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OMAP_CS2_BASE, &cs[3]);
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fl_idx = 0;
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#ifdef TARGET_WORDS_BIGENDIAN
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be = 1;
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#else
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be = 0;
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#endif
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if ((dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
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if (!pflash_cfi01_register(OMAP_CS0_BASE, NULL,
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"omap_sx1.flash0-1", flash_size,
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dinfo->bdrv, sector_size,
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flash_size / sector_size,
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4, 0, 0, 0, 0, be)) {
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fprintf(stderr, "qemu: Error registering flash memory %d.\n",
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fl_idx);
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}
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fl_idx++;
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}
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if ((version == 1) &&
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(dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
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memory_region_init_ram(flash_1, NULL, "omap_sx1.flash1-0", flash1_size);
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vmstate_register_ram_global(flash_1);
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memory_region_set_readonly(flash_1, true);
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memory_region_add_subregion(address_space, OMAP_CS1_BASE, flash_1);
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memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val,
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"sx1.cs1", OMAP_CS1_SIZE - flash1_size);
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memory_region_add_subregion(address_space,
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OMAP_CS1_BASE + flash1_size, &cs[1]);
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if (!pflash_cfi01_register(OMAP_CS1_BASE, NULL,
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"omap_sx1.flash1-1", flash1_size,
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dinfo->bdrv, sector_size,
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flash1_size / sector_size,
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4, 0, 0, 0, 0, be)) {
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fprintf(stderr, "qemu: Error registering flash memory %d.\n",
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fl_idx);
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}
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fl_idx++;
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} else {
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memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val,
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"sx1.cs1", OMAP_CS1_SIZE);
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memory_region_add_subregion(address_space,
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OMAP_CS1_BASE, &cs[1]);
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}
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if (!args->kernel_filename && !fl_idx) {
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fprintf(stderr, "Kernel or Flash image must be specified\n");
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exit(1);
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}
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/* Load the kernel. */
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if (args->kernel_filename) {
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sx1_binfo.kernel_filename = args->kernel_filename;
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sx1_binfo.kernel_cmdline = args->kernel_cmdline;
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sx1_binfo.initrd_filename = args->initrd_filename;
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arm_load_kernel(mpu->cpu, &sx1_binfo);
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}
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/* TODO: fix next line */
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//~ qemu_console_resize(ds, 640, 480);
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}
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static void sx1_init_v1(QEMUMachineInitArgs *args)
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{
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sx1_init(args, 1);
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}
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static void sx1_init_v2(QEMUMachineInitArgs *args)
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{
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sx1_init(args, 2);
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}
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static QEMUMachine sx1_machine_v2 = {
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.name = "sx1",
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.desc = "Siemens SX1 (OMAP310) V2",
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.init = sx1_init_v2,
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};
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static QEMUMachine sx1_machine_v1 = {
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.name = "sx1-v1",
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.desc = "Siemens SX1 (OMAP310) V1",
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.init = sx1_init_v1,
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};
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static void sx1_machine_init(void)
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{
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qemu_register_machine(&sx1_machine_v2);
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qemu_register_machine(&sx1_machine_v1);
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}
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machine_init(sx1_machine_init);
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