96fa263247
Implemented the instructions lxvp and stxvp using decodetree Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Luis Pires <luis.pires@eldorado.org.br> Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.castro@eldorado.org.br> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20211104123719.323713-15-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
406 lines
17 KiB
Plaintext
406 lines
17 KiB
Plaintext
#
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# Power ISA decode for 32-bit insns (opcode space 0)
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#
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# Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br)
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#
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# This library is free software; you can redistribute it and/or
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# modify it under the terms of the GNU Lesser General Public
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# License as published by the Free Software Foundation; either
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# version 2.1 of the License, or (at your option) any later version.
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#
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# This library is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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# Lesser General Public License for more details.
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#
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# You should have received a copy of the GNU Lesser General Public
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# License along with this library; if not, see <http://www.gnu.org/licenses/>.
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#
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&D rt ra si:int64_t
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@D ...... rt:5 ra:5 si:s16 &D
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&D_bf bf l:bool ra imm
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@D_bfs ...... bf:3 - l:1 ra:5 imm:s16 &D_bf
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@D_bfu ...... bf:3 - l:1 ra:5 imm:16 &D_bf
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%dq_si 4:s12 !function=times_16
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%dq_rtp 22:4 !function=times_2
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@DQ_rtp ...... ....0 ra:5 ............ .... &D rt=%dq_rtp si=%dq_si
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%dq_rt_tsx 3:1 21:5
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@DQ_TSX ...... ..... ra:5 ............ .... &D si=%dq_si rt=%dq_rt_tsx
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%rt_tsxp 21:1 22:4 !function=times_2
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@DQ_TSXP ...... ..... ra:5 ............ .... &D si=%dq_si rt=%rt_tsxp
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%ds_si 2:s14 !function=times_4
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@DS ...... rt:5 ra:5 .............. .. &D si=%ds_si
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%ds_rtp 22:4 !function=times_2
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@DS_rtp ...... ....0 ra:5 .............. .. &D rt=%ds_rtp si=%ds_si
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&DX rt d
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%dx_d 6:s10 16:5 0:1
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@DX ...... rt:5 ..... .......... ..... . &DX d=%dx_d
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&VA vrt vra vrb rc
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@VA ...... vrt:5 vra:5 vrb:5 rc:5 ...... &VA
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&VN vrt vra vrb sh
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@VN ...... vrt:5 vra:5 vrb:5 .. sh:3 ...... &VN
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&VX vrt vra vrb
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@VX ...... vrt:5 vra:5 vrb:5 .......... . &VX
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&VX_uim4 vrt uim vrb
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@VX_uim4 ...... vrt:5 . uim:4 vrb:5 ........... &VX_uim4
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&X rt ra rb
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@X ...... rt:5 ra:5 rb:5 .......... . &X
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&X_rc rt ra rb rc:bool
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@X_rc ...... rt:5 ra:5 rb:5 .......... rc:1 &X_rc
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%x_frtp 22:4 !function=times_2
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%x_frap 17:4 !function=times_2
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%x_frbp 12:4 !function=times_2
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@X_tp_ap_bp_rc ...... ....0 ....0 ....0 .......... rc:1 &X_rc rt=%x_frtp ra=%x_frap rb=%x_frbp
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@X_tp_a_bp_rc ...... ....0 ra:5 ....0 .......... rc:1 &X_rc rt=%x_frtp rb=%x_frbp
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&X_tb_rc rt rb rc:bool
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@X_tb_rc ...... rt:5 ..... rb:5 .......... rc:1 &X_tb_rc
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@X_tbp_rc ...... ....0 ..... ....0 .......... rc:1 &X_tb_rc rt=%x_frtp rb=%x_frbp
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@X_tp_b_rc ...... ....0 ..... rb:5 .......... rc:1 &X_tb_rc rt=%x_frtp
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@X_t_bp_rc ...... rt:5 ..... ....0 .......... rc:1 &X_tb_rc rb=%x_frbp
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&X_bi rt bi
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@X_bi ...... rt:5 bi:5 ----- .......... - &X_bi
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&X_bf bf ra rb
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@X_bf ...... bf:3 .. ra:5 rb:5 .......... . &X_bf
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@X_bf_ap_bp ...... bf:3 .. ....0 ....0 .......... . &X_bf ra=%x_frap rb=%x_frbp
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@X_bf_a_bp ...... bf:3 .. ra:5 ....0 .......... . &X_bf rb=%x_frbp
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&X_bf_uim bf uim rb
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@X_bf_uim ...... bf:3 . uim:6 rb:5 .......... . &X_bf_uim
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@X_bf_uim_bp ...... bf:3 . uim:6 ....0 .......... . &X_bf_uim rb=%x_frbp
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&X_bfl bf l:bool ra rb
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@X_bfl ...... bf:3 - l:1 ra:5 rb:5 ..........- &X_bfl
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&X_tb_sp_rc rt rb sp rc:bool
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@X_tb_sp_rc ...... rt:5 sp:2 ... rb:5 .......... rc:1 &X_tb_sp_rc
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@X_tbp_sp_rc ...... ....0 sp:2 ... ....0 .......... rc:1 &X_tb_sp_rc rt=%x_frtp rb=%x_frbp
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&X_tb_s_rc rt rb s:bool rc:bool
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@X_tb_s_rc ...... rt:5 s:1 .... rb:5 .......... rc:1 &X_tb_s_rc
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@X_tbp_s_rc ...... ....0 s:1 .... ....0 .......... rc:1 &X_tb_s_rc rt=%x_frtp rb=%x_frbp
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%x_rt_tsx 0:1 21:5
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@X_TSX ...... ..... ra:5 rb:5 .......... . &X rt=%x_rt_tsx
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&X_frtp_vrb frtp vrb
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@X_frtp_vrb ...... ....0 ..... vrb:5 .......... . &X_frtp_vrb frtp=%x_frtp
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&X_vrt_frbp vrt frbp
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@X_vrt_frbp ...... vrt:5 ..... ....0 .......... . &X_vrt_frbp frbp=%x_frbp
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&Z22_bf_fra bf fra dm
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@Z22_bf_fra ...... bf:3 .. fra:5 dm:6 ......... . &Z22_bf_fra
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%z22_frap 17:4 !function=times_2
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@Z22_bf_frap ...... bf:3 .. ....0 dm:6 ......... . &Z22_bf_fra fra=%z22_frap
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&Z22_ta_sh_rc rt ra sh rc:bool
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@Z22_ta_sh_rc ...... rt:5 ra:5 sh:6 ......... rc:1 &Z22_ta_sh_rc
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%z22_frtp 22:4 !function=times_2
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@Z22_tap_sh_rc ...... ....0 ....0 sh:6 ......... rc:1 &Z22_ta_sh_rc rt=%z22_frtp ra=%z22_frap
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&Z23_tab frt fra frb rmc rc:bool
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@Z23_tab ...... frt:5 fra:5 frb:5 rmc:2 ........ rc:1 &Z23_tab
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%z23_frtp 22:4 !function=times_2
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%z23_frap 17:4 !function=times_2
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%z23_frbp 12:4 !function=times_2
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@Z23_tabp ...... ....0 ....0 ....0 rmc:2 ........ rc:1 &Z23_tab frt=%z23_frtp fra=%z23_frap frb=%z23_frbp
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@Z23_tp_a_bp ...... ....0 fra:5 ....0 rmc:2 ........ rc:1 &Z23_tab frt=%z23_frtp frb=%z23_frbp
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&Z23_tb frt frb r:bool rmc rc:bool
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@Z23_tb ...... frt:5 .... r:1 frb:5 rmc:2 ........ rc:1 &Z23_tb
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@Z23_tbp ...... ....0 .... r:1 ....0 rmc:2 ........ rc:1 &Z23_tb frt=%z23_frtp frb=%z23_frbp
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&Z23_te_tb te frt frb rmc rc:bool
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@Z23_te_tb ...... frt:5 te:5 frb:5 rmc:2 ........ rc:1 &Z23_te_tb
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@Z23_te_tbp ...... ....0 te:5 ....0 rmc:2 ........ rc:1 &Z23_te_tb frt=%z23_frtp frb=%z23_frbp
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### Fixed-Point Load Instructions
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LBZ 100010 ..... ..... ................ @D
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LBZU 100011 ..... ..... ................ @D
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LBZX 011111 ..... ..... ..... 0001010111 - @X
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LBZUX 011111 ..... ..... ..... 0001110111 - @X
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LHZ 101000 ..... ..... ................ @D
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LHZU 101001 ..... ..... ................ @D
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LHZX 011111 ..... ..... ..... 0100010111 - @X
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LHZUX 011111 ..... ..... ..... 0100110111 - @X
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LHA 101010 ..... ..... ................ @D
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LHAU 101011 ..... ..... ................ @D
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LHAX 011111 ..... ..... ..... 0101010111 - @X
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LHAXU 011111 ..... ..... ..... 0101110111 - @X
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LWZ 100000 ..... ..... ................ @D
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LWZU 100001 ..... ..... ................ @D
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LWZX 011111 ..... ..... ..... 0000010111 - @X
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LWZUX 011111 ..... ..... ..... 0000110111 - @X
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LWA 111010 ..... ..... ..............10 @DS
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LWAX 011111 ..... ..... ..... 0101010101 - @X
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LWAUX 011111 ..... ..... ..... 0101110101 - @X
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LD 111010 ..... ..... ..............00 @DS
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LDU 111010 ..... ..... ..............01 @DS
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LDX 011111 ..... ..... ..... 0000010101 - @X
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LDUX 011111 ..... ..... ..... 0000110101 - @X
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LQ 111000 ..... ..... ............ ---- @DQ_rtp
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### Fixed-Point Store Instructions
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STB 100110 ..... ..... ................ @D
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STBU 100111 ..... ..... ................ @D
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STBX 011111 ..... ..... ..... 0011010111 - @X
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STBUX 011111 ..... ..... ..... 0011110111 - @X
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STH 101100 ..... ..... ................ @D
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STHU 101101 ..... ..... ................ @D
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STHX 011111 ..... ..... ..... 0110010111 - @X
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STHUX 011111 ..... ..... ..... 0110110111 - @X
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STW 100100 ..... ..... ................ @D
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STWU 100101 ..... ..... ................ @D
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STWX 011111 ..... ..... ..... 0010010111 - @X
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STWUX 011111 ..... ..... ..... 0010110111 - @X
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STD 111110 ..... ..... ..............00 @DS
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STDU 111110 ..... ..... ..............01 @DS
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STDX 011111 ..... ..... ..... 0010010101 - @X
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STDUX 011111 ..... ..... ..... 0010110101 - @X
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STQ 111110 ..... ..... ..............10 @DS_rtp
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### Fixed-Point Compare Instructions
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CMP 011111 ... - . ..... ..... 0000000000 - @X_bfl
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CMPL 011111 ... - . ..... ..... 0000100000 - @X_bfl
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CMPI 001011 ... - . ..... ................ @D_bfs
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CMPLI 001010 ... - . ..... ................ @D_bfu
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### Fixed-Point Arithmetic Instructions
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ADDI 001110 ..... ..... ................ @D
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ADDIS 001111 ..... ..... ................ @D
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ADDPCIS 010011 ..... ..... .......... 00010 . @DX
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## Fixed-Point Logical Instructions
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CFUGED 011111 ..... ..... ..... 0011011100 - @X
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CNTLZDM 011111 ..... ..... ..... 0000111011 - @X
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CNTTZDM 011111 ..... ..... ..... 1000111011 - @X
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PDEPD 011111 ..... ..... ..... 0010011100 - @X
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PEXTD 011111 ..... ..... ..... 0010111100 - @X
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### Float-Point Load Instructions
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LFS 110000 ..... ..... ................ @D
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LFSU 110001 ..... ..... ................ @D
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LFSX 011111 ..... ..... ..... 1000010111 - @X
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LFSUX 011111 ..... ..... ..... 1000110111 - @X
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LFD 110010 ..... ..... ................ @D
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LFDU 110011 ..... ..... ................ @D
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LFDX 011111 ..... ..... ..... 1001010111 - @X
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LFDUX 011111 ..... ..... ..... 1001110111 - @X
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### Float-Point Store Instructions
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STFS 110100 ..... ...... ............... @D
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STFSU 110101 ..... ...... ............... @D
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STFSX 011111 ..... ...... .... 1010010111 - @X
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STFSUX 011111 ..... ...... .... 1010110111 - @X
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STFD 110110 ..... ...... ............... @D
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STFDU 110111 ..... ...... ............... @D
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STFDX 011111 ..... ...... .... 1011010111 - @X
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STFDUX 011111 ..... ...... .... 1011110111 - @X
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### Move To/From System Register Instructions
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SETBC 011111 ..... ..... ----- 0110000000 - @X_bi
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SETBCR 011111 ..... ..... ----- 0110100000 - @X_bi
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SETNBC 011111 ..... ..... ----- 0111000000 - @X_bi
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SETNBCR 011111 ..... ..... ----- 0111100000 - @X_bi
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### Decimal Floating-Point Arithmetic Instructions
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DADD 111011 ..... ..... ..... 0000000010 . @X_rc
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DADDQ 111111 ..... ..... ..... 0000000010 . @X_tp_ap_bp_rc
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DSUB 111011 ..... ..... ..... 1000000010 . @X_rc
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DSUBQ 111111 ..... ..... ..... 1000000010 . @X_tp_ap_bp_rc
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DMUL 111011 ..... ..... ..... 0000100010 . @X_rc
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DMULQ 111111 ..... ..... ..... 0000100010 . @X_tp_ap_bp_rc
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DDIV 111011 ..... ..... ..... 1000100010 . @X_rc
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DDIVQ 111111 ..... ..... ..... 1000100010 . @X_tp_ap_bp_rc
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### Decimal Floating-Point Compare Instructions
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DCMPU 111011 ... -- ..... ..... 1010000010 - @X_bf
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DCMPUQ 111111 ... -- ..... ..... 1010000010 - @X_bf_ap_bp
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DCMPO 111011 ... -- ..... ..... 0010000010 - @X_bf
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DCMPOQ 111111 ... -- ..... ..... 0010000010 - @X_bf_ap_bp
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### Decimal Floating-Point Test Instructions
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DTSTDC 111011 ... -- ..... ...... 011000010 - @Z22_bf_fra
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DTSTDCQ 111111 ... -- ..... ...... 011000010 - @Z22_bf_frap
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DTSTDG 111011 ... -- ..... ...... 011100010 - @Z22_bf_fra
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DTSTDGQ 111111 ... -- ..... ...... 011100010 - @Z22_bf_frap
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DTSTEX 111011 ... -- ..... ..... 0010100010 - @X_bf
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DTSTEXQ 111111 ... -- ..... ..... 0010100010 - @X_bf_ap_bp
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DTSTSF 111011 ... -- ..... ..... 1010100010 - @X_bf
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DTSTSFQ 111111 ... -- ..... ..... 1010100010 - @X_bf_a_bp
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DTSTSFI 111011 ... - ...... ..... 1010100011 - @X_bf_uim
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DTSTSFIQ 111111 ... - ...... ..... 1010100011 - @X_bf_uim_bp
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### Decimal Floating-Point Quantum Adjustment Instructions
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DQUAI 111011 ..... ..... ..... .. 01000011 . @Z23_te_tb
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DQUAIQ 111111 ..... ..... ..... .. 01000011 . @Z23_te_tbp
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DQUA 111011 ..... ..... ..... .. 00000011 . @Z23_tab
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DQUAQ 111111 ..... ..... ..... .. 00000011 . @Z23_tabp
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DRRND 111011 ..... ..... ..... .. 00100011 . @Z23_tab
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DRRNDQ 111111 ..... ..... ..... .. 00100011 . @Z23_tp_a_bp
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DRINTX 111011 ..... ---- . ..... .. 01100011 . @Z23_tb
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DRINTXQ 111111 ..... ---- . ..... .. 01100011 . @Z23_tbp
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DRINTN 111011 ..... ---- . ..... .. 11100011 . @Z23_tb
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DRINTNQ 111111 ..... ---- . ..... .. 11100011 . @Z23_tbp
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### Decimal Floating-Point Conversion Instructions
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DCTDP 111011 ..... ----- ..... 0100000010 . @X_tb_rc
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DCTQPQ 111111 ..... ----- ..... 0100000010 . @X_tp_b_rc
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DRSP 111011 ..... ----- ..... 1100000010 . @X_tb_rc
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DRDPQ 111111 ..... ----- ..... 1100000010 . @X_tbp_rc
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DCFFIX 111011 ..... ----- ..... 1100100010 . @X_tb_rc
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DCFFIXQ 111111 ..... ----- ..... 1100100010 . @X_tp_b_rc
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DCFFIXQQ 111111 ..... 00000 ..... 1111100010 - @X_frtp_vrb
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DCTFIX 111011 ..... ----- ..... 0100100010 . @X_tb_rc
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DCTFIXQ 111111 ..... ----- ..... 0100100010 . @X_t_bp_rc
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DCTFIXQQ 111111 ..... 00001 ..... 1111100010 - @X_vrt_frbp
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### Decimal Floating-Point Format Instructions
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DDEDPD 111011 ..... .. --- ..... 0101000010 . @X_tb_sp_rc
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DDEDPDQ 111111 ..... .. --- ..... 0101000010 . @X_tbp_sp_rc
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DENBCD 111011 ..... . ---- ..... 1101000010 . @X_tb_s_rc
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DENBCDQ 111111 ..... . ---- ..... 1101000010 . @X_tbp_s_rc
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DXEX 111011 ..... ----- ..... 0101100010 . @X_tb_rc
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DXEXQ 111111 ..... ----- ..... 0101100010 . @X_t_bp_rc
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DIEX 111011 ..... ..... ..... 1101100010 . @X_rc
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DIEXQ 111111 ..... ..... ..... 1101100010 . @X_tp_a_bp_rc
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DSCLI 111011 ..... ..... ...... 001000010 . @Z22_ta_sh_rc
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DSCLIQ 111111 ..... ..... ...... 001000010 . @Z22_tap_sh_rc
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DSCRI 111011 ..... ..... ...... 001100010 . @Z22_ta_sh_rc
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DSCRIQ 111111 ..... ..... ...... 001100010 . @Z22_tap_sh_rc
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## Vector Bit Manipulation Instruction
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VCFUGED 000100 ..... ..... ..... 10101001101 @VX
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VCLZDM 000100 ..... ..... ..... 11110000100 @VX
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VCTZDM 000100 ..... ..... ..... 11111000100 @VX
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VPDEPD 000100 ..... ..... ..... 10111001101 @VX
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VPEXTD 000100 ..... ..... ..... 10110001101 @VX
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## Vector Permute and Formatting Instruction
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VEXTDUBVLX 000100 ..... ..... ..... ..... 011000 @VA
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VEXTDUBVRX 000100 ..... ..... ..... ..... 011001 @VA
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VEXTDUHVLX 000100 ..... ..... ..... ..... 011010 @VA
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VEXTDUHVRX 000100 ..... ..... ..... ..... 011011 @VA
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VEXTDUWVLX 000100 ..... ..... ..... ..... 011100 @VA
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VEXTDUWVRX 000100 ..... ..... ..... ..... 011101 @VA
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VEXTDDVLX 000100 ..... ..... ..... ..... 011110 @VA
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VEXTDDVRX 000100 ..... ..... ..... ..... 011111 @VA
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VINSERTB 000100 ..... - .... ..... 01100001101 @VX_uim4
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VINSERTH 000100 ..... - .... ..... 01101001101 @VX_uim4
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VINSERTW 000100 ..... - .... ..... 01110001101 @VX_uim4
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VINSERTD 000100 ..... - .... ..... 01111001101 @VX_uim4
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VINSBLX 000100 ..... ..... ..... 01000001111 @VX
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VINSBRX 000100 ..... ..... ..... 01100001111 @VX
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VINSHLX 000100 ..... ..... ..... 01001001111 @VX
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VINSHRX 000100 ..... ..... ..... 01101001111 @VX
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VINSWLX 000100 ..... ..... ..... 01010001111 @VX
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VINSWRX 000100 ..... ..... ..... 01110001111 @VX
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VINSDLX 000100 ..... ..... ..... 01011001111 @VX
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VINSDRX 000100 ..... ..... ..... 01111001111 @VX
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VINSW 000100 ..... - .... ..... 00011001111 @VX_uim4
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VINSD 000100 ..... - .... ..... 00111001111 @VX_uim4
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VINSBVLX 000100 ..... ..... ..... 00000001111 @VX
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VINSBVRX 000100 ..... ..... ..... 00100001111 @VX
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VINSHVLX 000100 ..... ..... ..... 00001001111 @VX
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VINSHVRX 000100 ..... ..... ..... 00101001111 @VX
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VINSWVLX 000100 ..... ..... ..... 00010001111 @VX
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VINSWVRX 000100 ..... ..... ..... 00110001111 @VX
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VSLDBI 000100 ..... ..... ..... 00 ... 010110 @VN
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VSRDBI 000100 ..... ..... ..... 01 ... 010110 @VN
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# VSX Load/Store Instructions
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LXV 111101 ..... ..... ............ . 001 @DQ_TSX
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STXV 111101 ..... ..... ............ . 101 @DQ_TSX
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LXVP 000110 ..... ..... ............ 0000 @DQ_TSXP
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STXVP 000110 ..... ..... ............ 0001 @DQ_TSXP
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LXVX 011111 ..... ..... ..... 0100 - 01100 . @X_TSX
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STXVX 011111 ..... ..... ..... 0110001100 . @X_TSX
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